Chaotic multi-objective optimization based design of fractional order PI{\lambda}D{\mu} controller in AVR system

TL;DR

This paper introduces a chaotic multi-objective evolutionary algorithm to design a fractional order PIλDμ controller for AVR systems, optimizing multiple conflicting objectives and comparing its performance to standard PID controllers.

Contribution

It presents a novel chaotic NSGA-II algorithm for designing fractional order controllers in AVR systems, improving multi-objective optimization effectiveness.

Findings

Pareto fronts illustrate trade-offs between design criteria.

Fractional order PIλDμ controller outperforms standard PID in certain metrics.

Chaotic map enhances the optimization process.

Abstract

In this paper, a fractional order (FO) PI{\lambda}D\mu controller is designed to take care of various contradictory objective functions for an Automatic Voltage Regulator (AVR) system. An improved evolutionary Non-dominated Sorting Genetic Algorithm II (NSGA II), which is augmented with a chaotic map for greater effectiveness, is used for the multi-objective optimization problem. The Pareto fronts showing the trade-off between different design criteria are obtained for the PI{\lambda}D\mu and PID controller. A comparative analysis is done with respect to the standard PID controller to demonstrate the merits and demerits of the fractional order PI{\lambda}D\mu controller.