Efficient cache oblivious algorithms for randomized divide-and-conquer on the multicore model

TL;DR

This paper introduces cache-oblivious randomized divide-and-conquer algorithms for sorting and convex hulls on multicore models, achieving optimal speed-up and cache efficiency with simple, general techniques.

Contribution

It presents a simplified, general approach to cache-oblivious randomized divide-and-conquer algorithms that achieve optimal performance for sorting and convex hulls on multicore systems.

Findings

Achieves optimal speed-up and cache misses in sorting and convex hull algorithms.

Introduces a simple randomized processor allocation technique.

Extends the approach to 3D convex hulls with optimal bounds.

Abstract

In this paper we present randomized algorithms for sorting and convex hull that achieves optimal performance (for speed-up and cache misses) on the multicore model with private cache model. Our algorithms are cache oblivious and generalize the randomized divide and conquer strategy given by Reischuk and Reif and Sen. Although the approach yielded optimal speed-up in the PRAM model, we require additional techniques to optimize cache-misses in an oblivious setting. Under a mild assumption on input and number of processors our algorithm will have optimal time and cache misses with high probability. Although similar results have been obtained recently for sorting, we feel that our approach is simpler and general and we apply it to obtain an optimal parallel algorithm for 3D convex hulls with similar bounds. We also present a simple randomized processor allocation technique without the explicit knowledge of the number of processors that is likely to find additional applications in resource oblivious environments.