A Cost- Effective Design of Reversible Programmable Logic Array

TL;DR

This paper presents a cost-effective reversible programmable logic array (RPLA) design using VHDL, demonstrating improved quantum cost and logical efficiency over existing designs through simulation and comparative analysis.

Contribution

The paper introduces a novel RPLA design utilizing MUX and Feynman gates, optimized for cost and efficiency, with validation through simulation and comparative analysis.

Findings

Improved quantum cost over existing RPLAs

Reduced logical calculations in the proposed design

Successful simulation on Xilinx ISE 8.2i

Abstract

In the recent era, Reversible computing is a growing field having applications in nanotechnology, optical information processing, quantum networks etc. In this paper, the authors show the design of a cost effective reversible programmable logic array using VHDL. It is simulated on xilinx ISE 8.2i and results are shown. The proposed reversible Programming logic array called RPLA is designed by MUX gate [10] & Feynman gate for 3- inputs, which is able to perform any reversible 3- input logic function or Boolean function. Furthermore the quantized analysis with camparitive finding is shown for the realized RPLA against the existing one. The result shows improvement in the quantum cost and total logical caculation in proposed RPLA.