Prototyping scalable digital signal processing systems for radio astronomy using dataflow models

TL;DR

This paper presents a high-level, platform-independent dataflow modeling approach for designing scalable digital signal processing systems in radio astronomy, demonstrated through a tunable digital downconverter for FPGA platforms.

Contribution

It introduces a dataflow-based design methodology using DIF, integrated with CASPER tools, enabling flexible and scalable DSP system development for radio astronomy.

Findings

Successful implementation of a reconfigurable tunable digital downconverter (TDD)

Analysis of trade-offs between flexible TDD and fixed FDD designs

Enhanced design abstraction and portability for FPGA-based DSP systems

Abstract

There is a growing trend toward using high-level tools for design and implementation of radio astronomy digital signal processing (DSP) systems. Such tools, for example, those from the Collaboration for Astronomy Signal Processing and Electronics Research (CASPER), are usually platform-specific, and lack high-level, platform-independent, portable, scalable application specifications. This limits the designer's ability to experiment with designs at a high-level of abstraction and early in the development cycle. We address some of these issues using a model-based design approach employing dataflow models. We demonstrate this approach by applying it to the design of a tunable digital downconverter (TDD) used for narrow-bandwidth spectroscopy. Our design is targeted toward an FPGA platform, called the Interconnect Break-out Board (IBOB), that is available from the CASPER. We use the term TDD to refer to a digital downconverter for which the decmation factor and center frequency can be reconfigured without the need for regenerating the hardware code. Such a design is currently not available in the CASPER DSP library. The work presented in this paper focuses on two aspects. Firstly, we introduce and demonstrate a dataflow-based design approach using the dataflow interchange format (DIF) tool for high-level application specification, and we integrate this approach with the CASPER tool flow. Secondly, we explore the trade-off between the flexibility of TDD designs and the low hardware cost of fixed-configuration digital downconverter (FDD) designs that use the available CASPER DSP library. We further explore this trade-off in the context of a two-stage downconversion scheme employing a combination of TDD or FDD designs.