Delay Analysis of Graphene Field-Effect Transistors

TL;DR

This paper investigates the carrier transit delay in graphene FETs, extracting intrinsic, extrinsic, and parasitic delays to improve understanding and optimization of RF GFET performance.

Contribution

It introduces a method to decompose delay components in GFETs and estimates carrier velocity directly from experimental data, aiding device optimization.

Findings

Achieved a 18-22 GHz cutoff frequency in GFETs.

Extracted internal and external capacitances from scaling behavior.

Provided a new approach to estimate carrier velocity from experimental data.

Abstract

In this letter, we analyze the carrier transit delay in graphene field-effect transistors (GFETs). GFETs are fabricated at the wafer-scale on sapphire substrate. For a device with a gate length of 210 nm, a current gain cut-off frequency fT of 18 GHz and 22 GHz is obtained before and after de-embedding. The extraction of the internal (Cgs,i, Cgd,i) and external capacitances (Cgs,ex and Cgd,ex) from the scaling behavior of the gate capacitances Cgs and Cgd allows the intrinsic ({\tau}_int), extrinsic ({\tau}_ext) and parasitic delays ({\tau}_par) to be obtained. In addition, the extraction of the intrinsic delay provides a new way to directly estimate carrier velocity from the experimental data while the breakdown of the total delay into intrinsic, extrinsic, and parasitic components can offer valuable information for optimizing RF GFETs structures.