First Experimental Demonstration of Gate-all-around III-V MOSFET by Top-down Approach
Jiangjiang Gu, Yiqun Liu, Yanqing Wu, Robert Colby, Roy G. Gordon, and, Peide D. Ye

TL;DR
This paper reports the first experimental demonstration of gate-all-around III-V MOSFETs with high mobility channels, showcasing promising scaling behavior and immunity to short channel effects using a top-down fabrication approach.
Contribution
It introduces a novel top-down fabrication process for III-V GAA MOSFETs with high mobility channels and demonstrates their performance at nanoscale dimensions.
Findings
Achieved well-behaved on/off performance at 50nm channel length.
Demonstrated immunity to short channel effects in 3D GAA structure.
Validated potential for ultimate scaling of III-V MOSFETs.
Abstract
The first inversion-mode gate-all-around (GAA) III-V MOSFETs are experimentally demonstrated with a high mobility In0.53Ga0.47As channel and atomic-layer-deposited (ALD) Al2O3/WN gate stacks by a top-down approach. A well-controlled InGaAs nanowire release process and a novel ALD high-k/metal gate process has been developed to enable the fabrication of III-V GAA MOSFETs. Well-behaved on-state and off-state performance has been achieved with channel length (Lch) down to 50nm. A detailed scaling metrics study (S.S., DIBL, VT) with Lch of 50nm - 110nm and fin width (WFin) of 30nm - 50nm are carried out, showing the immunity to short channel effects with the advanced 3D structure. The GAA structure has provided a viable path towards ultimate scaling of III-V MOSFETs.
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