Modular exponentiation of matrices on FPGA-s

TL;DR

This paper presents an efficient FPGA-based method for large matrix exponentiation, leveraging specific properties of matrices and FPGA architecture to significantly outperform traditional approaches.

Contribution

It introduces a novel FPGA implementation for matrix exponentiation that exploits matrix properties for enhanced speed, applicable to linear recurring sequences.

Findings

Achieved significant speedup over traditional architectures

Demonstrated efficiency in exponentiating large matrices on FPGA

Applicable to constructing linear recurring sequences

Abstract

We describe an efficient FPGA implementation for the exponentiation of large matrices. The research is related to an algorithm for constructing uniformly distributed linear recurring sequences. The design utilizes the special properties of both the FPGA and the used matrices to achieve a very significant speedup compared to traditional architectures.