Implementation of mean-timing and subsequent logic functions on an FPGA

TL;DR

This paper presents a clock-independent mean-timer and coincidence logic implementation on a Virtex-5 FPGA, achieving approximately 400 ps resolution for particle physics triggers, surpassing clock-limited timing accuracy.

Contribution

It introduces a novel clock-independent approach to mean-timing and coincidence logic on FPGA, enabling higher timing resolution in particle physics experiments.

Findings

Achieved approximately 400 ps timing resolution.

Demonstrated clock-independent logic implementation on FPGA.

Enhanced trigger precision for particle physics applications.

Abstract

This article describes the implementation of a mean-timer and coincidence logic on a Virtex-5 FPGA for trigger purposes in a particle physics experiment. The novel feature is that the mean-timing and the coincidence logic are not synchronized with a clock which allows for a higher resolution of approximately 400 ps, not limited by a clock frequency.