Magnetization Dynamics, Throughput and Energy Dissipation in a Universal Multiferroic Nanomagnetic Logic Gate with Fan-in and Fan-out

TL;DR

This paper simulates a multiferroic nanomagnetic NAND gate's switching dynamics, demonstrating high throughput and ultra-low energy dissipation, and discusses the potential for adiabatic clocking to further reduce external energy costs.

Contribution

It presents a detailed simulation of a multiferroic nanomagnetic logic gate with fan-in and fan-out, highlighting its high efficiency and potential for fault-tolerant classical computing.

Findings

Achieves ~0.5 GHz throughput with 2 ns gate operation time.

Total energy dissipation per gate is about 1000 kT, significantly lower than CMOS and spintronics NAND gates.

External clocking energy can be minimized with slow adiabatic clocking.

Abstract

The switching dynamics of a multiferroic nanomagnetic NAND gate with fan-in/fan-out is simulated by solving the Landau-Lifshitz-Gilbert (LLG) equation while neglecting thermal fluctuation effects. The gate and logic wires are implemented with dipole-coupled 2-phase (magnetostrictive/piezoelectric) multiferroic elements that are clocked with electrostatic potentials of ~50 mV applied to the piezoelectric layer generating 10 MPa stress in the magnetostrictive layers for switching. We show that a pipeline bit throughput rate of ~ 0.5 GHz is achievable with proper magnet layout and sinusoidal four-phase clocking. The gate operation is completed in 2 ns with a latency of 4 ns. The total (internal + external) energy dissipated for a single gate operation at this throughput rate is found to be only ~ 1000 kT in the gate and ~3000 kT in the 12-magnet array comprising two input and two output wires for fan-in and fan-out. This makes it respectively 3 and 5 orders of magnitude more energy-efficient than complementary-metal-oxide-semiconductor-transistor (CMOS) based and spin-transfer-torque-driven nanomagnet based NAND gates. Finally, we show that the dissipation in the external clocking circuit can always be reduced asymptotically to zero using increasingly slow adiabatic clocking, such as by designing the RC time constant to be 3 orders of magnitude smaller than the clocking period. However, the internal dissipation in the device must remain and cannot be eliminated if we want to perform fault-tolerant classical computing. Keywords: Nanomagnetic logic, multiferroics, straintronics and spintronics, Landau-Lifshitz-Gilbert equation.