AIG Rewriting Using 5-Input Cuts
Nan Li, Elena Dubrova

TL;DR
This paper introduces a 5-input cut-based rewriting algorithm for logic optimization, enhancing existing methods by reducing circuit area by an average of 5.57% when integrated into the ABC synthesis tool.
Contribution
The paper presents a novel 5-input cut-based rewriting algorithm that improves logic optimization by leveraging pre-computed NPN classes and Boolean matching.
Findings
Achieved 5.57% average area reduction in large circuits.
Complemented existing 4-input cut-based rewriting methods.
Integrated successfully into the ABC synthesis tool.
Abstract
Rewriting is a common approach to logic optimization based on local transformations. Most commercially available logic synthesis tools include a rewriting engine that may be used multiple times on the same netlist during optimization. This paper presents an And-Inverter graph based rewriting algorithm using 5-input cuts. The best circuits are pre-computed for a subset of NPN classes of 5-variable functions. Cut enumeration and Boolean matching are used to identify replacement candidates. The presented approach is expected to complement existing rewriting approaches which are usually based on 4-input cuts. The experimental results show that, by adding the new rewriting algorithm to ABC synthesis tool, we can further reduce the area of heavily optimized large circuits by 5.57% on average.
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Taxonomy
TopicsLow-power high-performance VLSI design · Formal Methods in Verification · VLSI and Analog Circuit Testing
