Logic circuits from zero forcing

TL;DR

This paper introduces a novel logic circuit model based on zero forcing on graphs, capable of evaluating all monotone Boolean functions and enabling reversible computation, with unique phenomena like back forcing.

Contribution

It presents a new graph-based logic circuit framework using zero forcing, demonstrating universal computation and reversible logic capabilities.

Findings

Circuits can evaluate all monotone Boolean functions

Zero forcing enables reversible computation

Back forcing phenomenon observed in circuit operations

Abstract

We design logic circuits based on the notion of zero forcing on graphs; each gate of the circuits is a gadget in which zero forcing is performed. We show that such circuits can evaluate every monotone Boolean function. By using two vertices to encode each logical bit, we obtain universal computation. We also highlight a phenomenon of "back forcing" as a property of each function. Such a phenomenon occurs in a circuit when the input of gates which have been already used at a given time step is further modified by a computation actually performed at a later stage. Finally, we point out that zero forcing can be also used to implement reversible computation. The model introduced here provides a potentially new tool in the analysis of Boolean functions, with particular attention to monotonicity.