SoC Software Components Diagnosis Technology
Svetlana Chumachenko, Wajeb Gharibi, Anna Hahanova, Aleksey Sushanov
TL;DR
This paper introduces a new method for evaluating hardware and software testability using register transfer graphs, including modeling techniques for testing and diagnosing system components.
Contribution
It presents a novel approach to testability evaluation through register transfer graph models, enhancing diagnosis and testing processes.
Findings
Effective modeling of hardware/software testability
Improved diagnosis capabilities
Enhanced testing procedures
Abstract
A novel approach to evaluation of hardware and software testability, represented in the form of register transfer graph, is proposed. Instances of making of software graph models for their subsequent testing and diagnosis are shown.
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