Reducing Quantum Cost in Reversible Toffoli Circuits
Marek Szyprowski, Pawel Kerntopf

TL;DR
This paper applies a recent tool for 4-bit reversible circuit synthesis to significantly reduce quantum cost, achieving up to 74% savings in benchmarks and recent designs.
Contribution
It demonstrates the first effective method for exact quantum cost minimization in 4-bit reversible circuits using an existing synthesis tool.
Findings
Quantum cost savings of up to 74% in benchmarks.
Successful application of the tool to recent circuit designs.
Significant improvement over previously known circuits.
Abstract
Recently, reversible circuit synthesis has been intensively studied. One of the problems that has not been solved for a long time was exact minimization of gate count (GC) in 4-bit circuits. Finally, last year a tool of practical usage for finding optimal gate count Toffoli networks for any 4-variable function was developed. However, not much work has been done yet on exact minimization of quantum cost (QC) in 4-bit circuits. This paper presents an application of the above mentioned tool to reducing QC of 4-bit reversible circuits. It is shown that for benchmarks and for designs taken from recent publications it is possible to obtain savings in QC of up to 74% comparing with previously known circuits.
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Taxonomy
TopicsQuantum Computing Algorithms and Architecture · Quantum-Dot Cellular Automata · Low-power high-performance VLSI design
