High purity semi-insulating 4H-SiC epitaxial layers by Defect-Competition Epitaxy

TL;DR

This paper demonstrates the growth of high-purity semi-insulating 4H-SiC layers using defect-competition epitaxy, identifying key defect centers and their implications for power device applications.

Contribution

It introduces a systematic method for growing high-resistivity 4H-SiC layers with detailed defect analysis and characterization.

Findings

Resistivity ≥ 10^9 Ω·cm achieved in homoepitaxial layers

Identification of Si-vacancy related deep centers as dominant defects

Recombination lifetimes around 5 ns suitable for fast-switching devices

Abstract

Thick, high-purity semi-insulating (SI)homoepitaxial layers on Si-face 4H-SiC weregrownsystematically, with resistivity \geq 109{\Omega}-cmby maintaining high C/Si ratios 1.3-15 during growth.Comparison of secondary ion mass spectra betweenlow-dopedepilayers grown at C/Si ratio<1.3andSI-epilayers grown at C/Si ratio>1.3 showed little difference in residual impurity concentrations. A reconciliation of impurity concentration with measured resistivity indicated a compensating trap concentration of ~1015cm-3present only in the SI-epilayers. High- resolution photo induced transient spectroscopy (HRPITS) identified themas Si-vacancy related deep centers, with no detectable EH6/7 and Z1/2levels. Recombination lifetimes ~5ns suggest application in fast-switching power devices.