Single-step implementation of the controlled-Z gate in a qubit/bus/qubit device

TL;DR

This paper presents a simple, high-fidelity, single-step controlled-Z gate implementation in a qubit/bus/qubit device, reducing complexity and errors compared to previous methods, suitable for first-generation quantum computers.

Contribution

A novel single-step CZ gate scheme using a tune/detune pulse that avoids additional qubit-bus operations, enhancing efficiency and fidelity in quantum computing architectures.

Findings

Achieves >99.99% intrinsic fidelity in 45 ns

Uses a single tune/detune pulse with adjustable parameters

Does not load excitation into the bus, simplifying implementation

Abstract

We propose a simple scheme for generating a high-fidelity controlled-Z (CZ) gate in a three-component qubit/bus/qubit device. The corresponding tune/detune pulse is single-step, with a near-resonant constant undershoot between the 200 and 101 states. During the pulse, the frequency of the first qubit is kept fixed, while the frequency of the second qubit is varied in such a way as to bring the 200 and 101 states close to resonance. As a result, the phase of the 101 state is accumulated via the corresponding second-order anticrossing. For experimentally realistic qubit frequencies and a 75 MHz coupling (150 MHz splitting), a 45 ns gate time can be realized with >99.99% intrinsic fidelity, with errors arising due to the non-adiabaticity of the ramps. The CZ pulse is characterized by two adjustable parameters: the undershoot magnitude and undershoot duration. The pulse does not load an excitation into the bus. This by-passes the previously proposed need for two additional qubit-to-bus and bus-to-qubit MOVE operations. Combined with the recently predicted high-fidelity idling operation in the RezQu architecture [A. Galiautdinov, J. Martinis, A. Korotkov (unpublished)], this controlled-Z scheme may prove useful for implementations on the first generation quantum computers.