Chaotic memristor
T. Driscoll, Y. V. Pershin, D. N. Basov, M. Di Ventra
TL;DR
This paper introduces and experimentally demonstrates a chaotic memristor, showing its chaotic behavior through measurements and theoretical analysis, with implications for nanoscale memristive devices.
Contribution
The paper presents the first experimental realization of a chaotic memristor using a resistive system with multi-well potential dynamics.
Findings
Chaotic behavior confirmed via Poincaré plots.
Lyapunov exponents indicate chaos.
Potential for chaos in nanoscale memristive devices.
Abstract
We suggest and experimentally demonstrate a chaotic memory resistor (memristor). The core of our approach is to use a resistive system whose equations of motion for its internal state variables are similar to those describing a particle in a multi-well potential. Using a memristor emulator, the chaotic memristor is realized and its chaotic properties are measured. A Poincar\'{e} plot showing chaos is presented for a simple nonautonomous circuit involving only a voltage source directly connected in series to a memristor and a standard resistor. We also explore theoretically some details of this system, plotting the attractor and calculating Lyapunov exponents. The multi-well potential used resembles that of many nanoscale memristive devices, suggesting the possibility of chaotic dynamics in other existing memristive systems.
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