Reconfigurable nanoelectronics using graphene based spintronic logic gates

TL;DR

This paper introduces a graphene-based spintronic logic gate design that integrates memory and logic, offering smaller, faster, and more energy-efficient nanoelectronic circuits with potential for revolutionary computing applications.

Contribution

It proposes a novel hybrid graphene/ferromagnet spintronic logic gate system with over 100 logic operations before spin-charge conversion, enabling low-power, high-speed nanoelectronics.

Findings

Smaller area and faster speed than CMOS

Over 100 spin-based logic operations without spin-charge conversion

Low power consumption in CMOS integration

Abstract

This paper presents a novel design concept for spintronic nanoelectronics that emphasizes a seamless integration of spin-based memory and logic circuits. The building blocks are magneto-logic gates based on a hybrid graphene/ferromagnet material system. We use network search engines as a technology demonstration vehicle and present a spin-based circuit design with smaller area, faster speed, and lower energy consumption than the state-of-the-art CMOS counterparts. This design can also be applied in applications such as data compression, coding and image recognition. In the proposed scheme, over 100 spin-based logic operations are carried out before any need for a spin-charge conversion. Consequently, supporting CMOS electronics requires little power consumption. The spintronic-CMOS integrated system can be implemented on a single 3-D chip. These nonvolatile logic circuits hold potential for a paradigm shift in computing applications.