Enhanced Logic Performance with Semiconducting Bilayer Graphene Channels

TL;DR

This paper demonstrates that dual-gated bilayer graphene with an alumina passivation layer can achieve large energy gaps, significantly improving transistor performance and enabling the creation of semiconducting graphene inverters for logic applications.

Contribution

It introduces a simple method to induce large energy gaps in bilayer graphene using a top gate with alumina, leading to enhanced transistor performance and the first demonstration of semiconducting graphene inverters.

Findings

Large transport energy gaps (>100 meV) achieved in bilayer graphene.

Enhanced electrical properties such as higher on/off ratio and better current saturation.

First demonstration of complementary-like semiconducting graphene inverters.

Abstract

Realization of logic circuits in graphene with an energy gap (EG) remains one of the main challenges for graphene electronics. We found that large transport EGs (>100 meV) can be fulfilled in dual-gated bilayer graphene underneath a simple alumina passivation top gate stack, which directly contacts the graphene channels without an inserted buffer layer. With the presence of EGs, the electrical properties of the graphene transistors are significantly enhanced, as manifested by enhanced on/off current ratio, subthreshold slope and current saturation. For the first time, complementary-like semiconducting logic graphene inverters are demonstrated that show a large improvement over their metallic counterparts. This result may open the way for logic applications of gap-engineered graphene.