Full 3D Quantum Transport Simulation of Atomistic Interface Roughness in Silicon Nanowire FETs

TL;DR

This paper presents a comprehensive 3D quantum transport simulation method for silicon nanowire FETs that accurately models interface roughness effects and matches experimental performance metrics.

Contribution

It introduces an atomistic simulation approach incorporating real-space interface roughness and oxide modeling, providing detailed insights into IRS effects on device performance.

Findings

Simulation accurately reproduces experimental ON-current and threshold voltage.

Mobility reduction due to IRS is quantitatively analyzed.

The model captures the impact of surface roughness on nanoscale FETs.

Abstract

The influence of interface roughness scattering (IRS) on the performances of silicon nanowire field-effect transistors (NWFETs) is numerically investigated using a full 3D quantum transport simulator based on the atomistic sp3d5s* tight-binding model. The interface between the silicon and the silicon dioxide layers is generated in a real-space atomistic representation using an experimentally derived autocovariance function (ACVF). The oxide layer is modeled in the virtual crystal approximation (VCA) using fictitious SiO2 atoms. <110>-oriented nanowires with different diameters and randomly generated surface configurations are studied. The experimentally observed ON-current and the threshold voltage is quantitatively captured by the simulation model. The mobility reduction due to IRS is studied through a qualitative comparison of the simulation results with the experimental results.