Proposal and design of a new SiC-emitter lateral NPM Schottky collector bipolar transistor on SOI for VLSI applications

TL;DR

This paper introduces a novel SiC-emitter lateral NPM Schottky collector bipolar transistor on SOI, demonstrating superior high-frequency and current gain performance through 2-D simulations for VLSI applications.

Contribution

It proposes a new SiC-emitter lateral NPM Schottky collector bipolar transistor structure with simulation validation and compares its performance with existing Si BJTs and HBTs.

Findings

High current gain and cut-off frequency

Reduced collector resistance and reverse recovery time

Suppressed Kirk effect

Abstract

A novel bipolar transistor structure, namely, a SiC emitter lateral NPM Schottky collector bipolar transistor (SCBT) with a silicon-on-insulator (SOI) substrate is explored using two-dimensional (2-D) simulation. A comprehensive comparison of the proposed structure with its equivalent Si lateral NPN BJT and an SiC emitter lateral NPN HBT is presented. Based on simulation results, the authors demonstrate for the first time that the proposed SiC emitter lateral NPM transistor shows superior performance in terms of high current gain and cut-off frequency, reduced collector resistance, negligible reverse recovery time and suppressed Kirk effect over its equivalent Si lateral NPN BJT and SiC emitter lateral NPN HBT. A simple fabrication process compatible with BiCMOS technology is also discussed.