Testing of Bridging Faults in AND-EXOR based Reversible Logic Circuits

TL;DR

This paper investigates the testability of reversible AND-EXOR based circuits, demonstrating a testing method for single bridging faults in circuits composed of k-CNOT gates implemented with irreversible AND and EXOR gates.

Contribution

It introduces a testing approach for single bridging faults in reversible k-CNOT circuits using AND-EXOR gates, a novel focus in reversible logic circuit testing.

Findings

Test for single bridging faults using a specific number of tests.

Reversible k-CNOT gates can be implemented with irreversible AND and EXOR gates.

A formula for the number of tests needed based on circuit inputs and outputs.

Abstract

Reversible circuits find applications in many areas of Computer Science including Quantum Computation. This paper examines the testability of an important subclass of reversible logic circuits that are composed of k-wire controlled NOT (k-CNOT with k >/- 1) gates. A reversible k-CNOT gate can be implemented using an irreversible k-input AND gate and an EXOR gate. A reversible k-CNOT circuit where each k-CNOT gate is realized using irreversible k-input AND and EXOR gate, has been considered. One of the most commonly used Single Bridging Fault model (both wired-AND and wired-OR) has been assumed to be type of fault for such circuits. It has been shown that an (n+p)-input AND-EXOR based reversible logic circuit with p observable outputs, can be tested for single bridging faults (SBF) using (3n + \lefthalfcap log2p \righthalfcap + 2) tests.