Analysis of Dynamic Linear and Non-linear Memristor Device Models for Emerging Neuromorphic Computing Hardware Design
Nathan R. McDonald, Robinson E. Pino, Peter J. Rozwood, Bryant T., Wysocki

TL;DR
This paper evaluates linear and non-linear memristor device models to facilitate efficient and accurate neuromorphic hardware design and large-scale system simulations.
Contribution
It provides a comparative analysis of practical memristor models focusing on their suitability for neuromorphic computing architecture simulation.
Findings
Analysis of linear and non-linear memristor models
Assessment of model complexity and simulation accuracy
Guidelines for model selection in neuromorphic design
Abstract
The value memristor devices offer to the neuromorphic computing hardware design community rests on the ability to provide effective device models that can enable large scale integrated computing architecture application simulations. Therefore, it is imperative to develop practical, functional device models of minimum mathematical complexity for fast, reliable, and accurate computing architecture technology design and simulation. To this end, various device models have been proposed in the literature seeking to characterize the physical electronic and time domain behavioral properties of memristor devices. In this work, we analyze some promising and practical non-quasi-static linear and non-linear memristor device models for neuromorphic circuit design and computing architecture simulation.
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