Wrapper/TAM Co-Optimization and Test Scheduling for SOCs Using Rectangle Bin Packing Considering Diagonal Length of Rectangles
Md. Rafiqul Islam, Muhammad Rezaul Karim, Abdullah Al Mahmud, Md., Saiful Islam, Hafiz Md. Hasan Babu

TL;DR
This paper presents a novel integrated framework for SOC test automation that optimizes wrapper and TAM co-configuration using rectangle packing considering diagonal length, aiming to reduce testing time while respecting power constraints.
Contribution
It introduces a new rectangle packing-based approach for wrapper/TAM co-optimization that accounts for diagonal length, improving test scheduling efficiency under power constraints.
Findings
Reduced testing time through efficient wrapper construction.
Effective test scheduling respecting power limitations.
Enhanced SOC test automation framework.
Abstract
This paper describes an integrated framework for SOC test automation. This framework is based on a new approach for Wrapper/TAM co-optimization based on rectangle packing considering the diagonal length of the rectangles to emphasize on both TAM widths required by a core and its corresponding testing time. In this paper, we propose an efficient algorithm to construct wrappers that reduce testing time for cores. We then use rectangle packing to develop an integrated scheduling algorithm that incorporates power constraints in the test schedule. The test power consumption is important to consider since exceeding the system's power limit might damage the system.
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Taxonomy
TopicsVLSI and Analog Circuit Testing · Integrated Circuits and Semiconductor Failure Analysis · Advancements in Photolithography Techniques
