Impact of Strain on Drain Current and Threshold Voltage of Nanoscale Double Gate Tunnel Field Effect Transistor: Theoretical Investigation and Analysis

TL;DR

This paper presents a theoretical analysis of a novel strained double-gate TFET device, demonstrating improved electrical performance and compliance with industry standards through device simulation.

Contribution

Introduction of a lateral strained double-gate TFET with enhanced on-current, reduced leakage, and better subthreshold slope, addressing key limitations of traditional TFETs.

Findings

Higher on-current and lower leakage current.

Low threshold voltage and excellent subthreshold slope.

Good short channel effects and compliance with ITRS guidelines.

Abstract

Tunnel field effect transistor (TFET) devices are attractive as they show good scalability and have very low leakage current. However they suffer from low on-current and high threshold voltage. In order to employ the TFET for circuit applications, these problems need to be tackled. In this paper, a novel lateral strained double-gate TFET (SDGTFET) is presented. Using device simulation, we show that the SDGTFET has a higher on-current, low leakage, low threshold voltage, excellent subthreshold slope, and good short channel effects and also meets important ITRS guidelines.