Building Toffoli Network for Reversible Logic Synthesis Based on Swapping Bit Strings

TL;DR

This paper introduces a method for synthesizing reversible logic circuits using a Toffoli network based on swapping bit strings, optimizing gate count and width through reduction rules and randomization.

Contribution

It presents a novel Toffoli network construction algorithm for reversible logic synthesis that minimizes gates and control inputs using template matching and random selection.

Findings

Produces near-optimal results for 3-input 3-output circuits

Reduces gate count and width effectively

Uses simple template matching for reduction

Abstract

In this paper, we have implemented and designed a sorting network for reversible logic circuits synthesis in terms of n*n Toffoli gates. The algorithm presented in this paper constructs a Toffoli Network based on swapping bit strings. Reduction rules are then applied by simple template matching and removing useless gates from the network. Random selection of bit strings and reduction of control inputs are used to minimize both the number of gates and gate width. The method produces near optimal results for up to 3-input 3-output circuits.