Realizing Wide Bandgap P-SiC-emitter Lateral Heterojunction Bipolar Transistors with low collectoremitter offset voltage and high current gain - A novel proposal using numerical simulation

TL;DR

This paper introduces a novel SiC-P-emitter lateral HBT design with dual-bandgap emitters, achieving low collector-emitter offset voltage and high current gain through numerical simulation and proposed fabrication methods.

Contribution

It proposes a new dual-bandgap emitter structure for wide bandgap SiC-P-emitter HBTs, reducing offset voltage and enhancing performance using numerical simulation.

Findings

Significantly reduced collector-emitter offset voltage.

High current gain and improved transient response.

Potential for BiCMOS compatible fabrication.

Abstract

We report a novel method to reduce the collector-emitter offset-voltage of the wide bandgap SiC-P-emitter lateral HBTs using a dual-bandgap emitter. In our approach, the collector-emitter offset-voltage VCE(offset) is reduced drastically by eliminating the built-in potential difference between the emitter-base (EB) junction and collector-base (CB) junction by using a SiC-on-Si P-emitter. We demonstrate that the proposed dualbandgap P-emitter HBT together with the SiGe base and Schottky collector, not only has a very low VCE(offset) but also exhibits high current gain, reduced Kirk effect, excellent transient response and high cutoff frequency. We evaluated the performance of the proposed device in detail using two dimensional device simulation and a possible BiCMOS compatible fabrication procedure is also suggested.