A Heuristic Algorithm for optimizing Page Selection Instructions
Qing'an Li, Yanxiang He, Yong Chen, Wei Wu, Wenwen Xu

TL;DR
This paper introduces a heuristic algorithm to optimize page selection instructions in microcontrollers, significantly reducing code size and improving memory efficiency in 8-bit MCUs.
Contribution
The paper presents a novel heuristic algorithm for function placement that minimizes page switching overhead, enhancing code compactness in microcontroller memory management.
Findings
Achieved 13.2% reduction in code size
Improved page selection instruction efficiency
Demonstrated effectiveness through experimental results
Abstract
Page switching is a technique that increases the memory in microcontrollers without extending the address buses. This technique is widely used in the design of 8-bit MCUs. In this paper, we present an algorithm to reduce the overhead of page switching. To pursue small code size, we place the emphasis on the allocation of functions into suitable pages with a heuristic algorithm, thereby the cost-effective placement of page selection instructions. Our experimental results showed the optimization achieved a reduction in code size of 13.2 percent.
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Taxonomy
TopicsParallel Computing and Optimization Techniques · Embedded Systems Design Techniques
