FPGA Based Assembling of Facial Components for Human Face Construction

TL;DR

This paper presents an FPGA implementation of a face tuning system within the FASY face synthesis framework, enabling efficient generation of new faces from textual descriptions through hardware-based assembly and tuning phases.

Contribution

It introduces a hardware description language-based tuning phase implemented on FPGA for face synthesis, enhancing the efficiency of face generation from textual data.

Findings

Successful FPGA implementation of face tuning process

Improved speed and efficiency in face synthesis

Effective hardware-based face assembly and tuning

Abstract

This paper aims at VLSI realization for generation of a new face from textual description. The FASY (FAce SYnthesis) System is a Face Database Retrieval and new Face generation System that is under development. One of its main features is the generation of the requested face when it is not found in the existing database. The new face generation system works in three steps - searching phase, assembling phase and tuning phase. In this paper the tuning phase using hardware description language and its implementation in a Field Programmable Gate Array (FPGA) device is presented.