Matrix multiplication using quantum-dot cellular automata to implement conventional microelectronics

TL;DR

This paper introduces a novel quantum-dot cellular automata (QCA) matrix multiplier design that enables efficient, parallelizable matrix multiplication, advancing QCA as a viable low-power alternative to traditional microelectronics.

Contribution

The paper presents a new QCA matrix multiplier structure using Coulomb blocked QCA cells and quasi-adiabatic switching, capable of implementing programmable matrix operations.

Findings

Simulation results with 1, 3, and 9 units demonstrate the structure's effectiveness.

The design supports highly parallel matrix multiplication operations.

It can implement any programmable logic array or matrix-based operation.

Abstract

Quantum-dot cellular automata (QCA) shows promise as a post silicon CMOS, low power computational technology. Nevertheless, to generalize QCA for next-generation digital devices, the ability to implement conventional programmable circuits based on NOR, AND, and OR gates is necessary. To this end, we devise a new QCA structure, the QCA matrix multiplier (MM), employing the standard Coulomb blocked, five quantum dot (QD) QCA cell and quasi-adiabatic switching for sequential data latching in the QCA cells. Our structure can multiply two N x M matrices, using one input and one bidirectional input/output data line. The calculation is highly parallelizable, and it is possible to achieve reduced calculation time in exchange for increasing numbers of parallel matrix multiplier units. We show convergent, ab initio simulation results using the Intercellular Hartree Approximation for one, three, and nine matrix multiplier units. The structure can generally implement any programmable logic array (PLA) or any matrix multiplication based operation.