Conception and FPGA implementation of IEEE 802.11s mesh network MAC layer transmitter

TL;DR

This paper presents a hardware FPGA implementation of the IEEE 802.11s mesh network MAC layer transmitter, addressing a gap in hardware-focused WMN research with a high-performance design.

Contribution

The paper introduces a novel FPGA-based hardware implementation of the IEEE 802.11s MAC transmitter, which is scarce in current WMN hardware research.

Findings

Achieved a high-speed FPGA implementation of the MAC transmitter.

Demonstrated the feasibility of hardware-based WMN MAC layer.

Provided a performance-efficient design based on IEEE 802.11s standard.

Abstract

This paper proposes, a hardware implementation of Wireless Mesh Networks (WMN) medium Access Controller (MAC) layer transmitter. In the literature a lot of works are focused on WMN routing protocol as well as performance analysis and software integration of WMN units, however few works deals with WMN hardware implementation. In this field our contribution is to conceive and to implements on FPGA a WMN MAC transmitter module. Our implementation, written in hardware description language (HDL) is based on the IEEE 802.11 s standard. The hardware implementation retains a good performance in speed.