Extremely Low Drift in Amorphous Phase Change Nanowire Materials

TL;DR

This paper demonstrates that amorphous Ge2Sb2Te5 nanowires with exposed surfaces exhibit extremely low resistance and threshold voltage drift compared to thin-film devices, highlighting stress relaxation as the main cause of drift in PCM.

Contribution

It reveals that surface exposure reduces drift in amorphous phase change nanowires, providing insights into stress relaxation mechanisms affecting PCM stability.

Findings

Exposed surface nanowires show minimal drift compared to thin films.

Embedded nanowires under dielectric films have drift levels similar to thin films.

Stress relaxation is identified as the primary cause of drift in PCM.

Abstract

Time-dependent drift of resistance and threshold voltage in phase change memory (PCM) devices is of concern as it leads to data loss. Electrical drift in amorphous chalcogenides has been argued to be either due to electronic or stress relaxation mechanisms. Here we show that drift in amorphized Ge2Sb2Te5 nanowires with exposed surfaces is extremely low in comparison to thin-film devices. However, drift in stressed nanowires embedded under dielectric films is comparable to thin-films. Our results shows that drift in PCM is due to stress relaxation and will help in understanding and controlling drift in PCM devices.