On Memory Accelerated Signal Processing within Software Defined Radios
Vincenzo Pellegrini, Luca Rose, and Mario Di Dio

TL;DR
This paper introduces Memory Acceleration (MA), a novel technique leveraging memory resources to significantly speed up signal processing in Software Defined Radios without sacrificing flexibility.
Contribution
It presents a new memory-based acceleration method for SDRs, demonstrated with a DVB-T Viterbi decoder achieving over 10x speedup without performance loss.
Findings
Achieved 10.4x acceleration on DVB-T Viterbi decoder
No impact on error correction performance
Compatible with existing optimization techniques
Abstract
Since J. Mitola's work in 1992, Software Defined Radios (SDRs) have been quite a hot topic in wireless systems research. Though many notable achievements were reported in the field, the scarcity of computational power on general purpose CPUs has always constrained their wide adoption in production environments. If conveniently applied within an SDR context, classical concepts known in computer science as space/time tradeoffs can be extremely helpful when trying to mitigate this problem. Inspired by and building on those concepts, this paper presents a novel SDR implementation technique which we call Memory Acceleration (MA) that makes extensive use of the memory resources available on a general purpose computing system, in order to accelerate signal computation. MA can provide substantial acceleration factors when applied to conventional SDRs without reducing their peculiar flexibility.…
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Taxonomy
TopicsAdvanced Wireless Communication Techniques · Coding theory and cryptography · Cryptography and Residue Arithmetic
