Proficient Pair of Replacement Algorithms on L1 and L2 Cache for Merge Sort
Richa Gupta, Sanjiv Tokekar

TL;DR
This paper analyzes cache replacement algorithms for merge sort, proposing a new partition-based algorithm for L1 cache and identifying effective pairs of algorithms for L1 and L2 to improve cache performance.
Contribution
It introduces a novel partition-based replacement algorithm for L1 cache and evaluates optimal pairs of algorithms for L1 and L2 caches in merge sort.
Findings
PBR_L1 outperforms FIFO by 1.7% to 44% in simulations.
FIFO performs better than LRU, LFU, and FIFO on L1 cache.
Optimal algorithm pairs vary with cache size and access patterns.
Abstract
Memory hierarchy is used to compete the processors speed. Cache memory is the fast memory which is used to conduit the speed difference of memory and processor. The access patterns of Level 1 cache (L1) and Level 2 cache (L2) are different, when CPU not gets the desired data in L1 then it accesses L2. Thus the replacement algorithm which works efficiently on L1 may not be as efficient on L2. Similarly various applications such as Matrix Multiplication, Web, Fast Fourier Transform (FFT) etc will have varying access pattern. Thus same replacement algorithm for all types of application may not be efficient. This paper works for getting an efficient pair of replacement algorithm on L1 and L2 for the algorithm Merge Sort. With the memory reference string of Merge Sort, we have analyzed the behavior of various existing replacement algorithms on L1. The existing replacement algorithms which…
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Taxonomy
TopicsAdvanced Data Storage Technologies · Algorithms and Data Compression · Parallel Computing and Optimization Techniques
