Design and Performance Analysis of Unified Reconfigurable Data Integrity Unit for Mobile Terminals

TL;DR

This paper presents a reconfigurable VLSI architecture for a data integrity unit in SDR mobile devices, supporting SHA-192 and MD-5 modes, optimized for high speed and minimal area.

Contribution

It introduces a multi-mode, reconfigurable integrity unit architecture for SDRs that optimizes area and speed, a novel design in mobile security hardware.

Findings

Achieves high-speed performance with pipelined design.

Maintains minimal area resource through multi-mode operation.

Outperforms related hash implementations in frequency and area-delay product.

Abstract

Security has become one of the major issue in mobile services. In the development of recent mobile devices like Software Defined Radio (SDR) secure method of software downloading is found necessary for reconfiguration. Hash functions are the important security primitives used for authentication and data integrity. In this paper, VLSI architecture for implementation of integrity unit in SDR is proposed. The proposed architecture is reconfigurable in the sense it operates in two different modes: SHA-192 and MD-5.Due to applied design technique the proposed architecture achieves multi-mode operation, which keeps the allocated area resource at minimized level. The proposed architecture also achieves highspeed performance with pipelined designed structure. Comparison with related hash function implementation have been done in terms of operating frequency, allocated-area and area-delay product. The proposed Integrity Unity can be integrated in security systems for implementation of network for wireless protocol, with special needs of integrity in data transmission.