Parallel structurally-symmetric sparse matrix-vector products on multi-core processors

TL;DR

This paper presents efficient multi-threaded algorithms for sparse matrix-vector multiplication of structurally symmetric matrices using CSRC format, addressing thread safety and synchronization issues to improve performance.

Contribution

It introduces two novel partitioning strategies, including a coloring algorithm, to enhance parallel performance for symmetric sparse matrix-vector products.

Findings

The array-based contribution accumulation yields the best performance.

Coloring-based row grouping effectively avoids race conditions.

Performance improvements are significant for most tested matrices.

Abstract

We consider the problem of developing an efficient multi-threaded implementation of the matrix-vector multiplication algorithm for sparse matrices with structural symmetry. Matrices are stored using the compressed sparse row-column format (CSRC), designed for profiting from the symmetric non-zero pattern observed in global finite element matrices. Unlike classical compressed storage formats, performing the sparse matrix-vector product using the CSRC requires thread-safe access to the destination vector. To avoid race conditions, we have implemented two partitioning strategies. In the first one, each thread allocates an array for storing its contributions, which are later combined in an accumulation step. We analyze how to perform this accumulation in four different ways. The second strategy employs a coloring algorithm for grouping rows that can be concurrently processed by threads. Our results indicate that, although incurring an increase in the working set size, the former approach leads to the best performance improvements for most matrices.