Sinusoidal Frequency Doublers Circuit With Low Voltage 1.5 Volt CMOS Inverter

TL;DR

This paper presents a low-voltage CMOS frequency doubler circuit using a simple, high-precision design with three main parts, verified through PSpice simulations.

Contribution

It introduces a novel low-voltage CMOS frequency doubler circuit with a straightforward, high-precision design suitable for low-power applications.

Findings

Circuit operates effectively at 1.5V supply.

Simulation confirms high accuracy and low error.

Design is simple and easy to understand.

Abstract

This paper is present sinusoidal frequency doublers circuit with low voltage 1.5 volt CMOS inverter. Main structure of circuit has three parts that is CMOS inverter circuit, differential amplifier circuit, and square root circuit. This circuit has designed to receive input voltage and give output voltage use few MOS transistor, easy to understand, non complex of circuit, high precision, low error and low power. The Simulation of circuit has MOS transistor functional in active and saturation period. PSpice programmed has used to confirmation of testing and simulation.