Some Architectures for Chebyshev Interpolation

TL;DR

This paper explores digital architectures for Chebyshev interpolation, proposing a word-serial variation, comparing it with equispaced systems, and demonstrating power savings with hybrid ADCs.

Contribution

It introduces a novel word-serial architecture for Chebyshev interpolation and compares its performance and power efficiency with traditional equispaced systems.

Findings

Word-serial architecture reduces complexity

Chebyshev interpolation offers lower reconstruction error

Hybrid ADCs can cut power consumption by up to one-third

Abstract

Digital architectures for Chebyshev interpolation are explored and a variation which is word-serial in nature is proposed. These architectures are contrasted with equispaced system structures. Further, Chebyshev interpolation scheme is compared to the conventional equispaced interpolation vis-a-vis reconstruction error and relative number of samples. It is also shown that the use of a hybrid (or dual) Analog to Digital converter unit can reduce system power consumption by as much as 1/3rd of the original.