Boosting XML Filtering with a Scalable FPGA-based Architecture
Abhishek Mitra (UC Riverside), Marcos Vieira (UCR), Petko Bakalov, (ESRI), Walid Najjar (UCR), Vassilis Tsotras (UCR)

TL;DR
This paper presents a scalable FPGA-based architecture for XML filtering that significantly improves throughput by parallel processing XPath queries directly on hardware, outperforming existing software solutions.
Contribution
The authors introduce a novel FPGA-based hardware architecture that efficiently processes XPath queries for XML filtering, achieving high scalability and throughput.
Findings
Over an order of magnitude throughput improvement
Efficient processing of a wide range of path queries
Elimination of communication bottlenecks in hardware implementation
Abstract
The growing amount of XML encoded data exchanged over the Internet increases the importance of XML based publish-subscribe (pub-sub) and content based routing systems. The input in such systems typically consists of a stream of XML documents and a set of user subscriptions expressed as XML queries. The pub-sub system then filters the published documents and passes them to the subscribers. Pub-sub systems are characterized by very high input ratios, therefore the processing time is critical. In this paper we propose a "pure hardware" based solution, which utilizes XPath query blocks on FPGA to solve the filtering problem. By utilizing the high throughput that an FPGA provides for parallel processing, our approach achieves drastically better throughput than the existing software or mixed (hardware/software) architectures. The XPath queries (subscriptions) are translated to regular…
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Taxonomy
TopicsAdvanced Database Systems and Queries · Peer-to-Peer Network Technologies · Data Management and Algorithms
