Single-generation Network Coding for Networks with Delay

TL;DR

This paper introduces a method to reduce memory requirements in network coding for networks with delay by employing memory at internal nodes, enabling single-generation coding and improving error correction performance.

Contribution

It presents an algorithm that uses memory at internal nodes to achieve single-generation network coding, reducing sink memory needs and enhancing network error correction.

Findings

Algorithm effectively reduces total memory elements needed.

Single-generation coding improves decoding efficiency.

Memory at nodes enhances error correction performance.

Abstract

A single-source network is said to be \textit{memory-free} if all of the internal nodes (those except the source and the sinks) do not employ memory but merely send linear combinations of the incoming symbols (received at their incoming edges) on their outgoing edges. Memory-free networks with delay using network coding are forced to do inter-generation network coding, as a result of which the problem of some or all sinks requiring a large amount of memory for decoding is faced. In this work, we address this problem by utilizing memory elements at the internal nodes of the network also, which results in the reduction of the number of memory elements used at the sinks. We give an algorithm which employs memory at the nodes to achieve single-generation network coding. For fixed latency, our algorithm reduces the total number of memory elements used in the network to achieve single-generation network coding. We also discuss the advantages of employing single-generation network coding together with convolutional network-error correction codes (CNECCs) for networks with unit-delay and illustrate the performance gain of CNECCs by using memory at the intermediate nodes using simulations on an example network under a probabilistic network error model.

Figures

Tables

Table 1. TABLE I: Comparing inter(memory-free) and single-generation network coding(using memory) for the network in Fig. 9

Sink	Network transfer matrix	Realizable decoding matrix	Network transfer matrix	No. of memory	No. of memory
	before Algorithm 2	obtained from $M_T^{-1}\left(z\right)$	after Algorithm 2	elements used	elements used
				before Algorithm 2	after Algorithm 2
$T_1$				3	1
$T_2$				3	2
$T_3$				7	2
$T_4$				6	2

Equations

$$n_{min}=\underset{T\in \mathcal{T}}{\min }{n}_{{}_T}$$

$$A_{i,j}=\left\{\begin{array}[]{cc}\alpha_{i,e_{j}}&\text{ if }e_{j}\in\Gamma_{O}(s)\\ 0&\text{ otherwise}\end{array}\right.$$

$$B^{T}_{i,j}=\left\{\begin{array}[]{cc}\epsilon_{e_{j},i}&\text{ if }e_{j}\in\Gamma_{I}(T)\\ 0&\text{ otherwise}\end{array}\right.$$

$$F(z):=(I-zK{)}^{-1}$$

$$M_T(z):=AF(z)B^T=A{F}_T(z).$$

$$\mathbf{y}(z)=\mathbf{x}(z)M_T(z).$$

$$M_T(z)=z^{L_T}{M}_T$$

$$\tilde{\mathcal{E}}:=\mathcal{E}\cup {\tilde{\Gamma }}_I(s)\cup \left(\bigcup _{T\in \mathcal{T}}{\tilde{\Gamma }}_O(T)\right)$$

$$A_{e_i,e_j}$$

$$K_{e_i,e_j}$$

$$B_{e_i,e_j}^v$$

$$A_{e_i,e_j}$$

$$K_{e_i,e_j}$$

$$\text{if}v\ne s,e_j\in {\Gamma }_O(v)$$

$$B_{e_i,e_j}^v$$

$${\Gamma }_{I,e_j}(v):=\left\{e_i\in {\Gamma }_I(v)|K_{e_i,e_j}\ne 0\right\}\bigcup \left\{e_i\in {\tilde{\Gamma }}_I(v)|A_{e_i,e_j}\ne 0\right\}.$$

$$M_{e_i,head(e_i),max}:=\underset{e_j\in {\Gamma }_{O,e_i}(v)}{\max }M{e}_i,e_j$$

$${\Gamma }_{O,e_i}(v):=\left\{e_j\in {\Gamma }_O(v)|K_{e_i,e_j}\ne 0\right\}\bigcup \left\{e_j\in {\tilde{\Gamma }}_O(v)|B_{e_i,e_j}^v\ne 0\right\}$$

$$M_v=\sum _{e_i\in {\Gamma }_I(v)\cup {\tilde{\Gamma }}_I(v)}{M}_{e_i,head(e_i),max}+\sum _{e_j\in {\Gamma }_O(v)\cup {\tilde{\Gamma }}_O(v)}{M}_{e_j,tail(e_j)}.$$

$${\mathcal{V}}_{{\mathcal{E}}^{\prime }}=\left\{head(e_j)|e_j\in {\mathcal{E}}^{\prime }\right\}$$

$$M_{e_i,head(e_i),min}:=\underset{e_j\in {\Gamma }_{O,e_i}(v)}{\min }M{e}_i,e_j$$

$$M_{{\mathcal{E}}^{\prime }}:=\underset{e_j\in {\mathcal{E}}^{\prime }}{\min }{M}_{e_j,head(e_j),min}$$

$${\mathcal{E}}_v:=\left\{v^{\prime }|v^{\prime }=head(e_j)\forall e_j\in {\Gamma }_O(v)\right\}.$$

$${\Gamma }_I^{\prime }(v)=\bigcup _{e_j\in {\Gamma }_O^{\prime }(v)}{\Gamma }_{I,e_j}(v).$$

$$M_{e_i,{\Gamma }_O^{\prime }(v)}=\max \left\{0,M_{{\Gamma }_O^{\prime }(v)}-M_{e_i,head(e_i),max}\right\}$$

$$\sum _{e_i\in {\Gamma }_I^{\prime }(v)}{M}_{e_i,{\Gamma }_O^{\prime }(v)}\le M_{{\Gamma }_O^{\prime }(v)}|{\Gamma }_O^{\prime }(v)|$$

$${\mathcal{E}}_I=$$

$${\mathcal{E}}_O=$$

$${\mathcal{E}}_I=$$

$${\mathcal{E}}_O\subset$$

$$P_v:=\left\{\left[{\Gamma }_{I_i}(v),{\Gamma }_{O_i}(v)\right]|1\le i\le s_v\right\}$$

$${\Gamma }_{I_i}(v)\cap {\Gamma }_{I_j}(v)$$

$${\Gamma }_{O_i}(v)\cap {\Gamma }_{O_j}(v)$$

$${\Gamma }_{O_i}(v)=\bigcup _{e_i\in {\Gamma }_{I_i}(v)}{\Gamma }_{O,e_i}(v)$$

$${\Gamma }_{I_i}(v)=\bigcup _{e_j\in {\Gamma }_{O_i}(v)}{\Gamma }_{I,e_j}(v)$$

Full text

I Introduction

Network coding was introduced in [1] as a means of achieving maximum rate of transmission in wireline networks. An algebraic formulation of network coding was discussed in [2] for both instantaneous networks and networks with delays. Convolutional network-error correcting codes(CNECCs) were introduced for acyclic instantaneous networks in [3] and for unit-delay, memory-free networks in [4].

In this work, we consider acyclic, single-source networks with delays which have a multicast network code in place. The set of all code symbols generated at the source at any particular time instant is called a generation. In unit-delay, memory-free networks, the nodes of the network may receive information of different generations on their incoming edges at every time instant and therefore network coding across generations (inter-generation) is unavoidable in general. However, the sinks have to employ memory to decode the symbols. If memory is utilized in the internal nodes also, such inter-generation network coding can be avoided thus making the decoding simpler.

We define a single-generation network code as a network code where all the symbols received at all the sinks are linear combinations of the symbols belonging to the same generation. In [5], the technique of adding memory at the nodes to achieve single-generation network coding was discussed. However this was done only on a per-node basis without considering the entire topology or the network code of the network. On the other hand, we consider the entire network topology and the network code, which govern the addition of memory elements at the nodes and the way in which they are rearranged across the network to reduce the overall memory usage in the network.

The organization and contributions of this work are as follows

• •

After briefly discussing the network setup and the network code for an acyclic network with delays and memory (Section II), we introduce different methods of adding memory at a node and analyze how each of them affect the local and global encoding kernels of the network code (Section III).

• •

We also present different memory reduction and distribution techniques (Section IV).

• •

We propose an algorithm which uses the memory at the nodes to achieve single-generation network coding while reducing the overall memory usage in the network (Section V).

• •

We discuss the advantages of employing memory at the intermediate nodes in tandem with CNECCs in terms of their encoding/decoding (Section VI).

• •

We illustrate the the performance benefits by using memory for CNECCs for unit-delay networks using simulations on an example unit-delay network under a probabilistic error setting (Section VII).

II Networks with delay and memory

The model for acyclic networks with delays considered in this paper is as in [2]. An acyclic network can be represented as an acyclic directed multi-graph (a graph that can have parallel edges between nodes) ${\cal G}$ = ($\cal V,\cal E$) where $\cal V$ is the set of all vertices and $\cal E$ is the set of all edges in the network.

We assume that every edge in the directed multi-graph representing the network has unit capacity (can carry utmost one symbol from $\mathbb{F}_{q}$, the field with $q$ elements). Network links with capacities greater than unit are modeled as parallel edges. The network has delays, i.e, every edge in the directed graph representing the input has a unit delay associated with it, represented by the parameter $z$. Such networks are known as unit-delay networks. Those network links with delays greater than unit are modeled as serially concatenated edges in the directed multi-graph. We assume a single-source node $s\in\cal V$ and a set of sinks $\cal T$. Let $n_{{}_{T}}$ be the unicast capacity for a sink node $T\in{\cal T}$ i.e the maximum number of edge-disjoint paths from $s$ to $T$. Then

[TABLE]

is the max-flow min-cut capacity of the multicast connection.

II-A Network code for unit-delay, memory-free networks

We follow [2] in describing the network code. For each node $v\in{\cal V}$, let the set of all incoming edges be denoted by $\Gamma_{I}(v)$. Then $|\Gamma_{I}(v)|=\delta_{I}(v)$ is the in-degree of $v$. Similarly the set of all outgoing edges is defined by $\Gamma_{O}(v)$, and the out-degree of the node $v$ is given by $|\Gamma_{O}(v)|=\delta_{O}(v)$.

For any $e\in{\cal E}$ and $v\in{\cal V}$, let $head(e)=v$, if $v$ is such that $e\in\Gamma_{I}(v)$. Similarly, let $tail(e)=v$, if $v$ is such that $e\in\Gamma_{O}(v)$. We will assume an ancestral ordering on ${\cal V}$ and ${\cal E}$ of the acyclic graph of the unit-delay, memory-free network.

The network code can be defined by the local kernel matrices of size $\delta_{I}(v)\times\delta_{O}(v)$ for each node $v\in{\cal V}$ with entries from $\mathbb{F}_{q}$. The global encoding kernels for each edge can be recursively calculated from these local kernels.

The network transfer matrix, which governs the input-output relationship in the network, is defined as given in [2] for an $n$-dimensional ($n\leq n_{min}$) network code. Towards this end, the matrices $A$,$K$,and $B^{T}$(for every sink $T\in{\cal T}$) are defined as follows.

The entries of the $n\times|{\cal E}|$ matrix $A$ are defined as

[TABLE]

where $\alpha_{i,e_{j}}\in\mathbb{F}_{q}$ is the local encoding kernel coefficient at the source coupling input $i$ with edge $e_{j}\in\Gamma_{O}(s)$.

The $(i,j)^{th}$ entry of the $|{\cal E}|\times|{\cal E}|$ matrix $K$ is $K_{e_{i},e_{j}}\in\mathbb{F}_{q}$ which is the local kernel coefficient between $e_{i}$ and $e_{j}$ at the node $head(e_{i})=tail(e_{j})$ (if such a node exists), and zero if $head(e_{i})\neq tail(e_{j})$.

For every sink $T\in{\cal T}$, the entries of the $|{\cal E}|\times n$ matrix $B^{T}$ are defined as

[TABLE]

where all $\epsilon_{e_{j},i}\in\mathbb{F}_{q}$.

For unit-delay, memory-free networks, we have

[TABLE]

where $I$ is the $|{\cal E}|\times|{\cal E}|$ identity matrix. Now we have the following definition.

Definition 1** ([2])**

The network transfer matrix, $M_{T}(z)$, corresponding to a sink node ${T}\in\cal T$ for a $n$-dimensional network code, is a full rank (over the field of rationals $\mathbb{F}_{q}(z)$) $n\times n$ matrix defined as

[TABLE]

With an $n$-dimensional network code, the input and the output of the network are $n$-tuples of elements from $\mathbb{F}_{q}[[z]]$, the formal power series ring over $\mathbb{F}_{q}.$ Definition 1 implies that if $\boldsymbol{x}(z)\in\mathbb{F}_{q}^{n}[[z]]$ is the input to the unit-delay, memory-free network, then at any particular sink $T\in\cal T$, we have the output, $\boldsymbol{y}(z)\in\mathbb{F}_{q}^{n}[[z]]$, to be

[TABLE]

II-B Network code for networks with delay and memory

We define the instantaneous counterpart of a unit-delay network as follows.

Definition 2

Given a unit-delay network ${\cal G}({\cal V},{\cal E})$, the network obtained from ${\cal G}$ (having the same node set ${\cal V}$ and the same edge set ${\cal E}$) by removing the delays associated with the edges is defined as the instantaneous counterpart of ${\cal G}({\cal V},{\cal E}).$

Example 1

Fig. 1 illustrates an example. A modified butterfly unit-delay network (top) and its instantaneous counterpart (bottom) are shown. The global kernels of the incoming edges to the sinks $T_{1}$ and $T_{2}$ corresponding to a $2$ dimensional network code are indicated for both networks.

Let ${\cal G}_{m}({\cal V},{\cal E})$ be a single-source, acyclic network with every edge of the network having some delay (a positive integer) and with memory elements at the nodes available for usage. If none of the memory elements at the nodes are used, then we can model ${\cal G}_{m}$ as a unit-delay, memory-free network ${\cal G}_{u}.$ Let ${\cal G}_{inst}$ be the instantaneous counterpart of ${\cal G}_{u}.$ The following lemma ensures the equivalence of a network code between ${\cal G}_{inst}$ and ${\cal G}_{u}.$

Lemma 1** ([4] )**

Let ${\cal G}^{\prime}({\cal V},{\cal E})$ be a single-source acyclic, unit-delay, memory-free network, and ${\cal G}^{\prime}_{inst}$ be the instantaneous counterpart of ${\cal G}^{\prime}.$ Let ${\cal N}$ be the set of all $\delta_{I}(v)\times\delta_{O}(v)$ matrices $\forall$ $v\in\cal V$, i.e, the set of local encoding kernel matrices at each node, describing an $m$-dimensional network code (over $\mathbb{F}_{q}$) for ${\cal G}^{\prime}_{inst}$ ($m\leq$ min-cut of the source-sink connections in ${\cal G}^{\prime}_{inst}$). Then the network code described by $\cal N$ continues to be an $m$-dimensional network code (over $\mathbb{F}_{q}(z)$) for the unit-delay, memory-free network ${\cal G}^{\prime}.$

If the nodes use memory elements such that inter-generation network coding is prevented at any particular node of the network, then this leads to single-generation network coding in the network.

In Section V we give an algorithm which uses memory elements at the nodes to achieve single-generation network coding, i.e, the network transfer matrix $M_{T}(z)$ of every sink $T\in\cal T$ in the in ${\cal G}_{m}$ becomes

[TABLE]

where $L_{T}$ is some positive integer and $M_{T}$ is the network transfer matrix of the sink $T$ in ${\cal G}_{inst}.$ Clearly, if $M_{T}$ is full rank (over $\mathbb{F}_{q}$), so is $M_{T}(z)$ (over $\mathbb{F}_{q}(z)$).

III Memory additions at a node

For the source node $s$, let $\tilde{\Gamma}_{I}(s)$ denote the set of $n$ virtual incoming edges which denote the $n$ inputs. The global kernels of these edges are therefore the columns of an $n\times n$ identity matrix over $\mathbb{F}_{q}$, the field over which the network code is defined. For every non-source node $v\in\cal V$, let $\tilde{\Gamma}_{I}(v)=\phi.$ For a sink $T\in\cal T$, let $\tilde{\Gamma}_{O}(T)$ denote $n$ virtual outgoing edges denoting the $n$ outputs at sink $T.$ The global kernels of these edges are the columns of the network transfer matrix $M_{T}(z).$ For every non-sink node $v\in\cal V$, let $\tilde{\Gamma}_{O}(v)=\phi.$ We then define the set $\tilde{{\cal E}}$ as

[TABLE]

The ancestral ordering on $\cal E$ can then be extended to an ancestral ordering on $\tilde{\cal E}$.

For any $e_{i},e_{j}\in\tilde{{\cal E}}$ such that $head(e_{i})=tail(e_{j})=v\in{\cal V}$, with memory being used at $v$, the local kernel $A_{e_{i},e_{j}}$ (the kernel coefficient between $e_{i}\in\tilde{\Gamma}_{I}(s)$ and $e_{j}\in\Gamma_{O}(s)$ with $s=v$), $K_{e_{i},e_{j}}$ or $B^{v}_{e_{i},e_{j}}$ (the kernel coefficient between $e_{i}$ and $e_{j}\in\tilde{\Gamma}_{O}(v)$ for some sink node $v$) can have elements from $\mathbb{F}_{q}(z).$ We show in Section V that using the memory elements at the nodes according to Subsection III-A and Subsection III-B is sufficient to guarantee single-generation network coding at each node and therefore in the given network.

III-A Adding memory at a node for a pair of an incoming and an outgoing edge

For any $e_{i},e_{j}\in\tilde{{\cal E}}$ such that $head(e_{i})=tail(e_{j})=v\in{\cal V}$, we define $M_{e_{i},e_{j}}$ as the number of memory elements utilized at the node $v$ to delay the symbols coming from the incoming edge $e_{i}$ (before any network coding is performed at node $v$ on the symbols from $e_{i}$) such that the local kernel between $e_{i}$ and $e_{j}$ is modified in one of the following ways

[TABLE]

while none of the other local kernels are changed. The matrix $F(z)=(I-zK)^{-1}$ is also correspondingly modified.

III-B Adding memory at a node for an outgoing edge

For $e_{j}\in\Gamma_{O}(v)\cup\tilde{\Gamma}_{O}(v)$, we define $M_{e_{j},tail(e_{j})}$ as the number of memory elements added at node $v$ to delay the symbols going into the edge $e_{j}$ after performing network coding at $v.$ In such a case, the elements of the matrix $K$ (or of the matrix or $A$, or $B^{v}$) are modified according to the following rule.

[TABLE]

where the set $\Gamma_{I,e_{j}}(v)\subseteq\Gamma_{I}(v)\cup\tilde{\Gamma}_{I}(v)$ is defined as in the top of the next page.

The elements of the matrix $F(z)$ are also correspondingly modified.

Example 2

Fig 2 illustrates an example of the memory additions at a node. The memory elements indicated inside the box labeled ‘A’ are added at the node for the pair of edges $e_{i}$ and $e_{j}$ thereby delaying the symbols on $e_{i}$ before network coding at the node, i.e, $M_{e_{i},e_{j}}=2.$ Similarly the memory element indicated by ‘C’ is added for the pair of edges $e_{i}$ and $e_{k}$, i.e, $M_{e_{i},e_{k}}=1.$ The memory element indicated by ‘B’ is added for the outgoing edge $e_{j}$ after network coding, i.e, $M_{e_{j},tail(e_{j})}=1.$

IV Memory reduction and distribution techniques

In this section, we look at techniques to reduce the memory used at the nodes of the network and the overall memory used in the network and also to obtain a fairly uniform memory usage distribution throughout the network.

We define the maximum number of memory elements added to delay the symbols coming from an edge $e_{i}\in\tilde{\cal E}$ into node $head(e_{i})=v$ as

[TABLE]

where $\Gamma_{O,e_{i}}(v)$ is defined as shown at the top of the next page.

We define the total number of memory elements used at node $v$ as

[TABLE]

IV-A Memory reduction in a single node

Consider a node $v\in{\cal V}$ in which memory elements have been added to delay symbols coming from an edge $e_{i}\in\Gamma_{I}(v)\cup\tilde{\Gamma}_{I}(v).$

Then, retaining the $M_{e_{i},head(e_{i}),max}$(as defined in (9)) memory elements, all other memory elements placed on $e_{i}$ can be removed without any change in any local or global kernels by tapping symbols from the $M_{e_{i},head(e_{i}),max}$ memory elements wherever necessary. Doing this for every incoming edge of $v$ is equivalent to obtaining a minimal encoder (one with minimum number of memory elements) of the transfer function (input-output relationship) at node $v.$

Example 3

Fig. 3 illustrates a particular example of such a reduction. The figure on the top (all $a_{i}\in\mathbb{F}_{q}$) represents a node $v$ before memory reduction with $M_{v}=3$, while the figure on the bottom is the same node after memory reduction with $M_{v}=2.$

IV-B Memory reduction between nodes

For a set of edges ${\cal E}^{\prime}\subseteq\tilde{\cal E}$, let ${\cal V}_{{\cal E}^{\prime}}$ be the set of all nodes defined as follows

[TABLE]

We now define $M_{e_{i},head(e_{i}),min}$ and $M_{{\cal E}^{\prime}}$ as follows.

[TABLE]

where $\Gamma_{O,e_{i}}(v)$ is as defined in (10).

For a node $v\in\cal V$, we define the set of adjacent nodes of $v$ as the set of nodes

[TABLE]

IV-B1 Memory reduction between adjacent nodes

For a node $v\in\cal V$, and for some $\Gamma_{O}^{\prime}(v)\subseteq\Gamma_{O}(v)\cup\tilde{\Gamma}_{O}(v)$, let $\Gamma_{I}^{\prime}(v)\subseteq\Gamma_{I}(v)\cup\tilde{\Gamma}_{I}(v)$ be defined as

[TABLE]

where $\Gamma_{I,e_{j}}(v)$ is as in (8), i.e, the global kernels of the edges in $e_{j}\in\Gamma_{O}^{\prime}(v)$ are linear combinations of the global kernels of the edges in $\Gamma_{I}^{\prime}(v)$ only and none else. Also let $M_{\Gamma_{O}^{\prime}(v)}$ and the set ${\cal V}_{\Gamma_{O}^{\prime}(v)}\subseteq{\cal E}_{v}$ of nodes be defined for the set of edges $\Gamma_{O}^{\prime}(v)$ as in (13) and (11) respectively.

We define the term $M_{e_{i},\Gamma_{O}^{\prime}(v)}$ as

[TABLE]

Then, if the condition is satisfied,

[TABLE]

then all of the $|\Gamma_{O}^{\prime}(v)|M_{\Gamma_{O}^{\prime}(v)}$ used at the nodes ${\cal V}_{\Gamma_{O}^{\prime}(v)}$ (to delay symbols coming from the edges $e_{j}\in\Gamma_{O}^{\prime}(v)$) can be ‘absorbed’ into node $v$ by removing all these memory elements and adding $M_{e_{i},\Gamma_{O}^{\prime}(v)}$ memory elements at node $v$ for every $e_{i}\in\Gamma_{I}^{\prime}(v)$ (and thereby used for delaying the symbols coming from every $e_{i}\in\Gamma_{I}^{\prime}(v)$), without using any additional memory and without changing the global kernels of any outgoing edge of any node in ${\cal V}_{\Gamma_{O}^{\prime}(v)}$.

This technique of ‘absorption’ of the memory elements from a set of nodes which are the ‘heads’ of the outgoing edges from a node $v$, to the node $v$ itself, is beneficial in terms of reducing the overall memory usage of the network (to achieve single-generation network coding) if the condition (15) is satisfied as a strict inequality.

Example 4

Fig. 4 illustrates an example for memory reduction between multiple nodes ($v_{1},v_{2},v_{3}$ and $v_{4}$ here) of a network. Here $M_{\Gamma_{O}^{\prime}(v)}=1,|\Gamma_{O}^{\prime}(v)|=3$, and $M_{e_{1},\Gamma_{O}^{\prime}(v)}=M_{e_{2},\Gamma_{O}^{\prime}(v)}=1.$ Therefore, three memory elements at nodes $v_{2},v_{3}$ and $v_{4}$ are ‘absorbed’ into two memory elements at node $v_{1}.$ The boxes indicate the use of memory elements and the node to which the memory elements are attached.

IV-B2 Memory reduction between nodes not necessarily adjacent

For ${\cal E}_{I},{\cal E}_{O}\subset\tilde{\cal E}$ being two sets of edges, we say that they form a pair $\left[{\cal E}_{I},{\cal E}_{O}\right]$ if

[TABLE]

We say that the sets ${\cal E}_{I},{\cal E}_{O}$ form a pair $\left.\left[{\cal E}_{I},{\cal E}_{O}\right.\right)$ if

[TABLE]

For a node $v$, we define the set $P_{v}$ as follows

[TABLE]

such that the following conditions are satisfied

[TABLE]

where $s_{v}$ is the maximum number of sets satisfying conditions (16) and (17). Algorithm 1 shown at the top of the next page obtains the set $P_{v}$ for some node $v.$

Example 5

Fig. 5 illustrates a node $v$ with the local kernel matrix over some field $\mathbb{F}_{q}.$ For this node, the set $P_{v}$ is given as

[TABLE]

*where *

[TABLE]

7

7

7

7

7

7

7

For an pair of edge-sets $\left[{\Gamma}_{I_{i}}(v),{\Gamma}_{O_{i}}(v)\right]\in P_{v}$, we define $S_{i}(v)$, a sequence of pairs of edge-sets as

[TABLE]

where $\left[{\cal E}_{i_{1}},{\cal E}_{o_{1}}\right]=\left[{\Gamma}_{I_{i}}(v),{\Gamma}_{O_{i}}(v)\right],$ and $m$ is the maximum length of the sequence, that is possible to be obtained as in (18) for the edge-set pair $\left[{\Gamma}_{I_{i}}(v),{\Gamma}_{O_{i}}(v)\right].$

Let $k$ be an integer such that

[TABLE]

For the set ${\Gamma}_{O_{i}}(v),$ let $M_{\Gamma_{O_{i}}}(v)$ be defined as in (13), and the set of nodes ${\cal V}_{\Gamma_{O_{i}}(v)}$ be defined as in (11). Let the set of nodes ${\cal V}_{{\cal E}_{i_{k}}}$ be defined as in (11) for the set ${\cal E}_{i_{k}}.$ Also, let $M_{e_{i_{k}},{\Gamma_{O_{i}}}}(v)$ be defined as in (14) for the set ${\Gamma}_{O_{i}}(v)$ and for an edge $e_{i_{k}}\in{\cal E}_{i_{k}}.$ As in the memory reduction procedure of adjacent nodes, if

[TABLE]

then the $|\Gamma_{O,i}(v)|M_{\Gamma_{O,i}(v)}$ used at the nodes ${\cal V}_{\Gamma_{O_{i}}(v)}$ (to delay symbols coming from the edges $e_{j}\in\Gamma_{O,i}(v)$) can be removed without changing the global kernels of the edges of $\Gamma_{O}(v^{\prime}),~{}\forall~{}v^{\prime}\in{\cal V}_{\Gamma_{O_{i}}(v)}$ by adding $M_{e_{i_{k}},\Gamma_{O_{i}}(v)}$ memory elements for each edge $e_{i_{k}}\in{\cal E}_{i_{k}}$ at the node $head(e_{i_{k}})\in{\cal V}_{{\cal E}_{i_{k}}}.$ This technique will save memory if the condition (19) is satisfied as a strict inequality.

Example 6

Figure 6 illustrates an example for the memory reduction procedure between non-adjacent nodes. Let $K_{e_{i},e_{j}}\neq 0,~{}\forall~{}9\leq i\leq 12,~{}13\leq j\leq 15.$ In the example, for the node ${v_{3}}$, the set $P_{v_{3}}$ and the sequence $S_{1}(v_{3})$ corresponding to the only element of $P_{v_{3}}$ are given by (20) and (21) at the top of the next page.

Now, we have $M_{\Gamma_{O,1}(v_{3})}=1$, $|\Gamma_{O,1}(v_{3})|=3$, ${\cal E}_{i_{k}}=\left\{e_{1}\right\}$ and $M_{e_{1},\Gamma_{O,1}(v_{3})}=1.$ Therefore, the $3$ memory used for the edges in $\Gamma_{O,1}(v_{3})$ at the nodes $v_{4},v_{5},$ and $v_{6}$ are ‘absorbed’ into a single memory element used at node $v_{1}$ for edge $e_{1}$, thus reducing the memory usage by $2.$

Remark 1

The memory reduction procedures of Subsubsection IV-B1, and Subsubsection IV-B2 can sometimes result in exactly the same memory reduction event. However, there could be instances in which only one of the procedures can achieve memory reduction.

For example, the memory reduction procedure of Subsubsection IV-B1 cannot reduce memory at node $v_{3}$ in the situation shown in Example 6 because for any $\Gamma_{O}^{\prime}(v)\subseteq\Gamma_{O}(v)$, $|\Gamma_{I}^{\prime}(v)|>3\geq|\Gamma_{O}^{\prime}(v)|$, since $\Gamma_{I}^{\prime}(v)=\Gamma_{I}(v).$ However the memory reduction procedure of Subsubsection IV-B2 does work as shown in Fig 6.

Similarly, in some cases, at a node, the procedure of Subsubsection IV-B1 can be used to reduce memory usage, while Subsubsection IV-B2 cannot be applied. This is because of the fact that, at any node, the procedure of Subsubsection IV-B2 takes into account only those sets of the form $P_{v}$, while the procedure of Subsubsection IV-B1 takes into account all possible incoming and outgoing edges. Such a case is seen in Example 7.

Example 7

Fig. 7 shows the node $v$ of Fig. 5 (Example 5) in a particular configuration. The memory reduction procedure of Subsubsection IV-B2 cannot be applied for the set $\Gamma_{O,2}(v)$ because $M_{\Gamma_{O,2}(v)}=0.$

But $M_{\left\{e_{6},e_{7}\right\}}=1$, and therefore $2$ memory elements at node $v_{1}$ and $v_{2}$ can be absorbed into a single memory element at node $v$, thereby facilitating memory reduction according to Subsubsection IV-B1.

IV-C Memory distribution

The following technique can be used to distribute memory elements throughout the network in a somewhat uniform way. Suppose there exists a node $v\in\cal V$ such that for some $e_{j}\in\Gamma_{O}(v)$ with $v^{\prime}=head(e_{j})$ and for some integer $m\leq M_{e_{j},head(e_{j}),min}$,

[TABLE]

then the $m$ memory elements at node $v^{\prime}$ used to delay symbols coming from edge $e_{j}$ can be ‘absorbed’ into node $v$ (thereby using them to delay symbols going into edge $e_{j}$) without changing the global kernels of any edge in $\Gamma_{O}(v^{\prime}).$

This technique reduces the number of memory elements used at node $v^{\prime}$ for delaying its incoming symbols while increasing the number ($M_{e_{j},tail(e_{j})}$) of memory elements used at node $v$ for delaying its outgoing symbols.

Example 8

Fig 8 illustrates an example for memory distribution between two nodes $v_{1}$ and $v_{2}.$ In the figure on the top, $m=1,M_{v_{1}}=0,$ and $M_{v_{2}}=3.$ Therefore one memory element from $v_{2}$ (used to delay symbols coming from $e_{j}$ into $v_{2}$) can be ‘absorbed’ into node $v_{1}$ (and thereby used to delay symbols going into $e_{j}$ from $v_{1}$). The boxes indicate the node to which the memory elements are attached. After distribution, $M_{v_{1}}=1,$ and $M_{v_{2}}=2.$

V Single-generation network coding - Algorithm

This section presents the main contribution of this paper.

For an edge $e_{i}\in{\cal E}$, let $\boldsymbol{f}_{e_{i}}(z)\in\mathbb{F}_{q}^{n}(z)$ represent the global kernel of $e_{i}.$ We say that a node $v\in{\cal V}\backslash\left\{s\right\}$ is a coding node if the global kernel of at least one of its outgoing edge is a $\mathbb{F}_{q}(z)$ linear combination of the global kernels of at least two of its incoming edges. Otherwise, we call $v$ a forwarding node.

Let ${\cal V}_{cod}$ be the set of coding nodes, and ${\cal V}_{fwd}$ be the set of forwarding nodes. Let ${\cal V}_{cod}^{0}$ be the set of all coding nodes such that there exist no path in the network from any other coding node to any node in ${\cal V}_{cod}^{0}.$

Towards proposing an algorithm to enable single-generation network coding, we make some observations and discuss the addition of memory elements at the coding nodes to achieve single-generation network coding.

Observation 1

For any $v\in{\cal V}_{cod}^{0}$, the global kernel of any $e\in\Gamma_{I}(v)$ is of the form

[TABLE]

for some positive integer $l_{e}$, with $\boldsymbol{f}_{e}\in\mathbb{F}_{q}^{n}.$ If the network is a unit-delay network and the node $v$ uses no memory, the global kernel of any $e_{j}\in\Gamma_{O}(v)$ is of the form

[TABLE]

where $l_{e_{i}}$ is a positive integer signifying accumulated delay from the source to edge $e_{i}$, and $K_{e_{i},e_{j}}\in\mathbb{F}_{q}$ signifies the local kernel coefficient between $e_{i}$ and $e_{j}.$ The additional $z$ is to account for the delay in the unit delay network.

V-A Single-generation processing at the nodes

For every pair of edges $e_{i},e_{i^{\prime}}\in\Gamma_{I,e_{j}}(v)$ ($\Gamma_{I,e_{j}}(v)$ being as in (8)) in (24) such that $l_{e_{i}}<l_{e_{i^{\prime}}}$, we may add $M_{e_{i},e_{j}}=l_{e_{i^{\prime}}}-l_{e_{i}}$ memory elements at node $v$ to delay the symbols coming from $e_{i}$ such that the global kernel of the edge $e_{j}$ becomes

[TABLE]

where $l_{e_{j},max}=\max_{e_{i}\in\Gamma_{I,e_{j}}(v)}l_{e_{i}}$ and $K_{e_{i},e_{j}}\in\mathbb{F}_{q}.$ Once this process of using memory at the node $v$ results in the global kernel of every edge in $\Gamma_{O}(v)$ to be a linear combination of symbols from the same generation (generations between different outgoing edges need not be the same), we say that single-generation processing has been achieved at node $v.$ For a node $T\in\cal T$, we say that single-generation processing has been achieved at sink $T$ if the condition (1) is satisfied along with condition (25) for each $e_{j}\in\Gamma_{O}(T).$

Observation 2

We iteratively define the set ${\cal V}_{cod}^{i}\subseteq{\cal V}_{cod}$ as the set of coding nodes which have path only from

[TABLE]

where ${\cal V}_{cod}^{0}$ is as defined before. Once memory has been used to achieve single-generation processing at all nodes in ${\cal V}_{cod}^{i-1}$, it can be observed that the global kernels of the incoming and outgoing edges of any node $v\in{\cal V}_{cod}^{i}$ satisfy the same condition as in (23) and (24).

Thus again memory elements can be used at the nodes of ${\cal V}_{cod}^{i}$ to implement single-generation processing, ultimately achieving single-generation processing at each coding node of the network.

V-B Algorithm for single-generation network coding

Algorithm 2 shown in the next page is used to achieve single-generation network coding using memory at the nodes of the network, while trying to minimize the total number of memory elements used in the network.

Remark 2

Algorithm 2 assumes that every node has unlimited memory to use and then tries to obtain a configuration that reduces the number of memory elements used in the network. However, if the maximum available memory in the nodes is limited, then the following techniques may be adopted after running Algorithm 2.

• •

In line 27 of the algorithm, instead of checking condition (22) at every pair of nodes connected by some edge, the actual memory capability of the nodes must be taken into account and then the distribution procedure of Subsection IV-C can be run.

• •

Finally, at every node in which the algorithm demands more memory elements than what is available, sufficient memory elements should be removed so that the total memory used at the node is utmost what is available. As the penalty of removing these memory elements will be compensated by the sinks, the memory elements that will be removed at the nodes should ideally be such that the compensation occurs in the least number of sinks in the least possible quantity.

7**

7**

7**

7**

7**

7**

7**

Example 9

Fig. 10, Fig. 11, and Fig. 12 represent the network at various stages of the algorithm applied on a modified double-butterfly network as shown in Fig. 9. The modified unit-delay double-butterfly network shown in Fig. 10 has the standard network code over $\mathbb{F}_{2}.$ $s$ is the source node, $T_{i},i=1,2,3,4$ are the sinks. The dotted lines represent the virtual input edges at the source and virtual output edges at the sinks.

Table I shows the network transfer matrices before and after obtaining single-generation processing using Algorithm 2. Table I also shows a comparison between the memory requirements at the sinks (for decoding) between inter-generation network coding (i.e the memory-free case; the numbers shown are the sum of the row degrees of realizable inverse matrices in the third column) and single-generation network coding (as shown in Fig. 12). In the memory-free case, assuming that sinks use memory individually to decode, the total number of memory elements used in the network is $19$, and all of them are used at the sinks. In the single-generation network coded network as shown in Fig. 12, it can be seen that the total number of memory elements used in the network is $12$, out of which only $7$ are used at the sinks, thereby showing a marked reduction from the memory-free case. The rest of the memory elements (numbering $5$) are distributed across the nodes of the network.

V-C Comparison with the approach of [5]

We can compare the straightforward approach of [5] and our approach to obtaining a single-generation network coded network for the modified unit-delay double-butterfly network of Fig. 9. According to the technique in [5], the result would be the network as in Fig. 10, thereby resulting in the use of $20$ memory elements to obtain single-generation network coding. However, our algorithm utilizes the memory reduction and distribution techniques as given in Section IV and results in the output being as in Fig 12 using $12$ memory elements and a more uniform distribution of memory elements across the network than in Fig. 10. Although the overall memory usage is reduced, it still remains to be shown whether Algorithm 2 actually obtains a configuration of the network with minimal number of memory elements being used to obtain single-generation network coding.

VI Impact of single-generation network coding on network-error correction

VI-A Impact on encoding

Construction of a CNECC: For details on the basics of convolutional codes, we refer the reader to [6]. The construction of a CNECC [4] for a given acyclic, unit-delay, memory-free network which corrects error vectors corresponding to a given set $\Phi$ of error patterns (an error pattern is a subset of $\cal E$ indicating the edges in error) can be summarized as follows

• •

Compute the set ${\cal W}_{s}$ of error vector reflections given by

[TABLE]

where $\boldsymbol{w}\in F_{q}^{|{\cal E}|}$ is an error vector, and $\boldsymbol{w}\in\rho$ means that $\boldsymbol{w}$ matches an error pattern $\rho.$ $p_{{}_{T}}(z)\in\mathbb{F}_{q}[z]$(the ring of polynomials) is some processing function chosen such that the processing matrix $p_{{}_{T}}(z)M_{T}^{-1}(z)=P_{T}(z)$ is a polynomial matrix.

• •

Let $t_{s}=\max_{\boldsymbol{w}_{s}(z)\in{\cal W}_{s}}w_{H}\left(\boldsymbol{w}_{s}(z)\right).$ Choose an input convolutional code ${\cal C}_{s}$ with free distance at least $2t_{s}+1$ as the CNECC for the given network.

The following lemma gives a bound on $t_{s}$ and therefore the free distance demanded of the CNECC.

Lemma 2** ( [4] )**

Given an acyclic, unit-delay, memory-free network ${\cal G}({\cal V},{\cal E})$ with a given error pattern set $\Phi$, let $T_{delay}-1$ be the maximum degree of any polynomial in the $F(z)$ matrix. Let $w_{H}$ indicate the Hamming weight over $\mathbb{F}_{q}.$ If $r$ is the maximum number of non-zero coefficients of the polynomials $p_{{}_{T}}(z)$ corresponding to all sinks in $\cal T$, i.e $r=\max_{T\in{\cal T}}w_{H}\left(p_{{}_{T}}(z)\right)$, then we have

[TABLE]

Algorithm 2 does not increase the value of $T_{delay}$ in the matrix $F(z)$ because of the fact that an additional delay would not be introduced on any path between nodes which are at a distance of $T_{delay}$ edges (the maximum number of edges on any path between any two nodes) from each other. Also, with memory being introduced in the nodes according to Algorithm 2, the network transfer matrices at all the sinks are of the form as given in (1). Therefore the processing functions at any sink $T$ is of the form $p_{{}_{T}}(z)=z^{L_{T}}$, i.e $r=1.$

Therefore we have that, for the network with delay and memory (used to achieve single-generation network coding),

[TABLE]

Thus, it is seen that the bound for $t_{s}$ and therefore for the free distance demanded of the CNECC may be lower (if $r>1$) for the unit-delay, single-generation network coded network compared to the unit-delay, memory-free counterpart. However a decrease in the actual value of $t_{s}$ cannot be guaranteed and has to be computed for every network individually in order to decide whether the CNECC designed for the unit-delay, memory-free network will continue to work for the single-generation network coded unit-delay counterpart.

VI-B Impact on decoding

Decoding of a CNECC: Let $G_{I}(z)$ be the generator matrix of the code ${\cal C}_{s}$ thus designed. Then we refer to the code ${\cal C}_{s}$ as the input convolutional code [3]. The effective code seen by a sink $T$ is generated by the matrix $G_{O,T}(z)=G_{T}(z)M_{T}(z)$, which is known as the output convolutional code[3], ${\cal C}_{O,T}$, at sink $T.$ The decoding of the CNECC at any sink $T$ can be performed either on the trellis of the code ${\cal C}_{s}$ or that of the code ${\cal C}_{O,T}$ at that particular sink according to the free distance of ${\cal C}_{O,T}$ ($d_{free}({\cal C}_{O,T})$), the catastrophic/non-catastrophic nature of $G_{O,T}(z)$, and a parameter called $T_{d_{free}}({\cal C}_{O,T})$, whose definition for a rate $b/c$ code $\cal C$ over $\mathbb{F}_{q}$ is given in [3] as follows.

[TABLE]

where $S_{d_{free}}$ [3] is defined as follows.

[TABLE]

where

[TABLE]

is a truncated codeword sequence with $\boldsymbol{v}_{i}\in\mathbb{F}_{q}^{c})$, $\boldsymbol{\sigma}_{t}$ indicates the content of the delay elements in the encoder at a time $t$, and $w_{H}$ indicates the Hamming weight over $\mathbb{F}_{q}.$ The set $S_{d_{free}}$ consisting of all possible truncated codeword sequences $\boldsymbol{v}_{[0,j)}$ of weight less than $d_{free}({\cal C})$ that start in the zero state. Then, we have the following proposition.

Proposition 1** ([3] )**

The minimum Hamming weight trellis decoding algorithm can correct all error sequences which have the property that the Hamming weight of the error sequence in any consecutive $T_{d_{free}}({\cal C})$ segments (a segment being a collection of $c$ output symbols corresponding to every $b$ input symbols) is utmost $\left\lfloor\frac{d_{free}({\cal C})-1}{2}\right\rfloor$.

With the CNECC in place in a unit-delay. memory-free network, under certain conditions (see Subsection IV-D of [4]), a sink has to decode on the trellis of the input convolutional code, in which case the sink has to multiply the incoming $n$ output streams with the processing matrix $P_{T}(z)$, which may require additional memory elements to implement. However, with a single-generation network code implemented using memory elements, part of this processing is done in a distributed manner in the other nodes of the network, thereby decreasing the memory requirement at the sinks.

In the forthcoming section, we further observe the advantages that the use of memory in the intermediate nodes offers in the performance of CNECCs under a probabilistic error setting.

VII Simulation results

VII-A A probabilistic error model

Probabilistic error models have been considered in the context of random network coding in [7]. We define a probabilistic error model for a unit delay network ${\cal G}({\cal V},{\cal E})$ by defining the probabilities of any set of $i~{}(i\leq|{\cal E}|)$ edges of the network being in error at any given time instant. Across time instants, we assume that the network errors are i.i.d. according to this distribution.

[TABLE]

where $1<i\leq|{\cal E}|,$ and $p,q\leq 1$ are real numbers indicating the probability of any single edge error in the network and the probability of no edges in error respectively, such that $q+\sum_{i=1}^{|{\cal E}|}p^{i}=1.$

VII-B Simulations on the modified butterfly network

Fig. 13 on the top of the next page shows a modified butterfly network before and after running Algorithm 2. This network is clearly a part of the modified double-butterfly network of Fig. 9, and the associated matrices at the sinks $T_{1}$ and $T_{2}$ are given in Table I.

With the probability model as in (27) and (28) with $|{\cal E}|=10$ for this network, we simulate the performance of $3$ input convolutional codes implemented on this network for both the with-memory and memory-free cases as in Fig. 13 with the sinks performing hard decision decoding on the trellis of the input convolutional code.

In the following discussion we refer to sinks $T_{1}$ and $T_{2}$ of Fig. 13 as Sink 1 and Sink 2. The $3$ input convolutional codes and the rationality behind choosing them are given as follows.

• •

Code ${\cal C}_{1}$ is generated by the generator matrix

[TABLE]

with $d_{free}({\cal C}_{1})=3$ and $T_{d_{free}}({\cal C}_{1})=2.$ This code is chosen only to illustrate the error correcting capability of codes with low values of $d_{free}({\cal C})$ and $T_{d_{free}}({\cal C}).$

• •

Code ${\cal C}_{2}$ is generated by the generator matrix

[TABLE]

with $d_{free}({\cal C}_{2})=5$ and $T_{d_{free}}({\cal C}_{2})=6.$ This code corrects all double edge errors in the instantaneous version (with all edge delays and memories being zero) of Fig. 13 as long as they are separated by $6$ network uses.

• •

Code ${\cal C}_{3}$ is generated by the generator matrix

[TABLE]

with $d_{free}({\cal C}_{3})=7$ and $T_{d_{free}}({\cal C}_{3})=12.$ This code corrects all double edge errors in the unit-delay network given in Fig. 13 as long as they are separated by $12$ network uses.

We note here that values of $T_{d_{free}}({\cal C})$ of the $3$ codes are directly proportional to their free distances, i.e, the code with greater free distance has higher $T_{d_{free}}({\cal C})$.

Fig. 14 and Fig. 15 illustrate the BERs for these $3$ codes for both the with-memory and memory-free case for different values of the parameter $p$ (the probability of a single edge error) of (27). Clearly the BER values fall with decreasing $p.$

The description and explanation of the regions marked ‘$d_{free}$ dominated region’ and ‘$T_{d_{free}}$ dominated region’ (named so according to the dominant parameter in those regions) are given in [3]. In the following discussion, we concentrate on the comparison between the performance of every code in the memory-free and the with-memory case. Towards that end, we recall from Proposition 1 that both the Hamming weight of error events and the separation between any two consecutive error events are important to correct them.

Performance improvement of CNECCs with memory at the intermediate nodes

With respect to codes ${\cal C}_{2}$ and ${\cal C}_{3}$, we see that there is an improvement in performance when memory is used at the intermediate nodes. This is because of the fact that the presence of memory elements in the network results in a clumping-together of error bits at the sinks. For example, assume that in the network of Fig. 13, an error occurs in edge $s\rightarrow v_{1}$ at time instant $t_{1}.$ We consider the situation at Sink 2. In the memory-free case, the effect of this error is felt at different time instants at the two incoming edges of Sink 2, at $t_{1}+1$ and at $t_{1}+4$. However, with memory elements at the intermediate nodes, the effects of the edge error now occur at the same time instant ($t_{1}+4$) in both the incoming edges of Sink 2. The effect of such errors cumulatively result in more error events (with less Hamming weights each) in the memory-free case (because of the distribution of errors) and less error events (with comparatively more Hamming weights each) in the with-memory case (as a result of clumped errors). However, because Codes ${\cal C}_{2}$ and ${\cal C}_{3}$ have enough free distance, the number of such error events is what dominates the performance. Therefore Codes ${\cal C}_{2}$ and ${\cal C}_{3}$ correct more errors in the with-memory case. The same effect may be observed at Sink 1 also. 2. 2.

With respect to the code ${\cal C}_{1}$, there is no observable change in performance between the memory-free and with-memory cases. We note that the same effect is observed with the errors as in the previous case. But because of $T_{d_{free}}({\cal C}_{1})$ being less (only $2$), the clumping together of error bits does not benefit much. Therefore there is no significant improvement in performance. 3. 3.

There is no significant difference in the performance of any code between the memory-free and the with-memory case in the ‘$d_{free}$ dominated region.’ This is because of the fact that the errors that occur in the network are already sparse.

Acknowledgment

This work was supported partly by the DRDO-IISc program on Advanced Research in Mathematical Engineering through a research grant to B. S. Rajan.