Analog Noise Reduction in Enzymatic Logic Gates

TL;DR

This study demonstrates that enzymatic logic gates can significantly reduce analog noise amplification by selecting co-substrates with lower enzyme affinity, enhancing the reliability of biochemical computing.

Contribution

The paper introduces a method to minimize noise amplification in enzymatic logic gates through substrate specificity, supported by both theoretical analysis and experimental validation.

Findings

Negligible increase in output noise compared to input noise.

Experimental validation with horseradish peroxidase confirms theoretical predictions.

Different co-substrates with varying rate constants affect noise reduction effectiveness.

Abstract

In this work we demonstrate both experimentally and theoretically that the analog noise generation by a single enzymatic logic gate can be dramatically reduced to yield gate operation with virtually no input noise amplification. This is achieved by exploiting the enzyme's specificity when using a co-substrate that has a much lower affinity than the primary substrate. Under these conditions, we obtain a negligible increase in the noise output from the logic gate as compared to the input noise level. Experimental realizations of the AND logic gate with the enzyme horseradish peroxidase using hydrogen peroxide and two different co-substrates, 2,2'-azino-bis(3-ethylbenzthiazoline-6-sulphonic acid) (ABTS) and ferrocyanide, with vastly different rate constants confirmed our general theoretical conclusions.