Accelerating Scientific Computations with Mixed Precision Algorithms

TL;DR

This paper explores mixed precision algorithms that combine 32-bit and 64-bit floating point operations to accelerate scientific computations across various modern hardware architectures while preserving solution accuracy.

Contribution

It introduces a novel approach to enhance computational performance using mixed precision arithmetic applicable to diverse hardware platforms.

Findings

Performance gains with mixed precision algorithms

Maintained 64-bit solution accuracy

Effective on CPUs, GPUs, FPGAs, and STI Cell BE

Abstract

On modern architectures, the performance of 32-bit operations is often at least twice as fast as the performance of 64-bit operations. By using a combination of 32-bit and 64-bit floating point arithmetic, the performance of many dense and sparse linear algebra algorithms can be significantly enhanced while maintaining the 64-bit accuracy of the resulting solution. The approach presented here can apply not only to conventional processors but also to other technologies such as Field Programmable Gate Arrays (FPGA), Graphical Processing Units (GPU), and the STI Cell BE processor. Results on modern processor architectures and the STI Cell BE are presented.