InAs Nanowire MOS Capacitors
Stefano Roddaro, Kristian Nilsson, Gvidas Astromskas, Lars Samuelson, and Lars-Erik Wernersson, Ovol Karlstrom, Andreas Wacker

TL;DR
This paper reports a capacitance-voltage study of InAs nanowire MOS capacitors, demonstrating a fabrication method that allows detailed analysis of carrier density and interface quality in nanowire-based devices.
Contribution
It introduces a systematic fabrication and characterization approach for InAs nanowire MOS capacitors, enabling detailed interface and carrier density analysis.
Findings
Successful fabrication of InAs nanowire MOS capacitors with HfO2 insulation.
Ability to analyze carrier density and interface quality systematically.
Potential for improved nanowire device performance.
Abstract
We present a capacitance-voltage study for arrays of vertical InAs nanowires. MOS capacitors are obtained by insulating the nanowires with a conformal 10nm HfO2 layer and using a top Cr/Au metallization as one of the capacitor's electrodes. The described fabrication and characterization technique enables a systematic investigation of the carrier density in the nanowires as well as of the quality of the MOS interface.
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Taxonomy
TopicsSemiconductor materials and devices · Nanowire Synthesis and Applications · Advancements in Semiconductor Devices and Circuit Design
