Short time die attach characterisation of semiconductor devices
P. Szabo, M. Rencz

TL;DR
This paper introduces a rapid thermal transient measurement method combined with structure function evaluation for die attach characterization in semiconductor devices, enabling efficient inline testing and improved device reliability.
Contribution
It presents a novel short time thermal transient measurement technique and a calibration elimination method for die attach quality assessment in semiconductor manufacturing.
Findings
Effective in-line testing of LEDs achieved
Calibration process significantly reduced
Method accurately detects voids and delaminations
Abstract
Thermal qualification of the die attach of semiconductor devices is a very important element in the device characterization as the temperature of the chip is strongly affected by the quality of the die attach. Voids or delaminations in this layer may cause higher temperature elevation and thus damage or shorter lifetime. Thermal test of each device in the manufacturing process would be the best solution for eliminating the devices with wrong die attach layer. In this paper we will present the short time thermal transient measurement method and the structure function evaluation through simulations and measurements for die attach characterization. We will also present a method for eliminating the very time consuming calibration process. Using the proposed methods even the in-line testing of LEDs can be accomplished.
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Taxonomy
TopicsVLSI and Analog Circuit Testing · VLSI and FPGA Design Techniques · 3D IC and TSV technologies
