Temperature measurement of sub-micrometric ICs by scanning thermal microscopy

TL;DR

This study uses scanning thermal microscopy with a micrometric probe to measure surface temperatures of sub-micrometric integrated circuits, highlighting the challenges posed by device design and topography.

Contribution

It demonstrates the application of SThM to sub-micrometric ICs with nanometric passivation layers and analyzes the spatial resolution limits of the technique.

Findings

Nanometric passivation layers enable distinguishing resistive lines at 10 micron period.

Signal-to-noise ratio improved by AC heating of resistive lines.

Measurement difficulties arise from IC design, topography, and probe size.

Abstract

Surface temperature measurements were performed with a Scanning Thermal Microscope mounted with a thermoresistive wire probe of micrometrSurface temperature measurements were performed with a Scanning Thermal Microscope mounted with a thermoresistive wire probe of micrometric size. A CMOS device was designed with arrays of resistive lines 0.35$\mu$m in width. The array periods are 0.8micron and 10micron to study the spatial resolution of the SThM. Integrated Circuits with passivation layers of micrometric and nanometric thicknesses were tested. To enhance signal-to-noise ratio, the resistive lines were heated with an AC current. The passivation layer of nanometric thickness allows us to distinguish the lines when the array period is 10micron. The results raise the difficulties of the SThM measurement due to the design and the topography of ICs on one hand and the size of the thermal probe on the other hand.ic size. A CMOS device was designed with arrays of resistive lines 0.35$\mu$m in width. The array periods are 0.8micron and 10micron to study the spatial resolution of the SThM. Integrated Circuits with passivation layers of micrometric and nanometric thicknesses were tested. To enhance signal-to-noise ratio, the resistive lines were heated with an AC current. The passivation layer of nanometric thickness allows us to distinguish the lines when the array period is 10micron. The results raise the difficulties of the SThM measurement due to the design and the topography of ICs on one hand and the size of the thermal probe on the other hand.