SystemC Analysis of a New Dynamic Power Management Architecture

TL;DR

This paper introduces a novel dynamic power management architecture for System on Chip, utilizing a Power State Machine aligned with ACPI standards, which optimizes power states based on battery, temperature, and task priority.

Contribution

It proposes a new power management architecture with an ACPI-compliant Power State Machine controlling chip power states based on multiple operational parameters.

Findings

Effective power state control based on battery, temperature, and task priority

Alignment with ACPI standards enhances compatibility

Potential for improved power efficiency in SoC designs

Abstract

This paper presents a new dynamic power management architecture of a System on Chip. The Power State Machine describing the status of the core follows the recommendations of the ACPI standard. The algorithm controls the power states of each block on the basis of battery status, chip temperature and a user defined task priority.