A Constraint Network Based Approach to Memory Layout Optimization
G. Chen, M. Kandemir, M. Karakoy

TL;DR
This paper introduces a constraint network approach to optimize memory layouts for arrays, addressing limitations of loop restructuring by systematically selecting layouts that benefit entire programs.
Contribution
It formulates memory layout optimization as a constraint network problem and explores systematic solution methods, advancing data transformation techniques.
Findings
Constraint processing effectively supports memory layout optimization.
Systematic methods outperform heuristic approaches.
Future research directions are identified for further improvement.
Abstract
While loop restructuring based code optimization for array intensive applications has been successful in the past, it has several problems such as the requirement of checking dependences (legality issues) and transformation of all of the array references within the loop body indiscriminately (while some of the references can benefit from the transformation, others may not). As a result, data transformations, i.e., transformations that modify memory layout of array data instead of loop structure have been proposed. One of the problems associated with data transformations is the difficulty of selecting a memory layout for an array that is acceptable to the entire program (not just to a single loop). In this paper, we formulate the problem of determining the memory layouts of arrays as a constraint network, and explore several methods of solution in a systematic way. Our experiments…
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Taxonomy
TopicsConstraint Satisfaction and Optimization · Parallel Computing and Optimization Techniques · Distributed and Parallel Computing Systems
