System Synthesis for Networks of Programmable Blocks
Ryan Mannion, Harry Hsieh, Susan Cotterell, Frank Vahid

TL;DR
This paper presents a method for synthesizing sensor network diagrams into optimized networks of programmable blocks, reducing size, cost, and power consumption through an efficient partitioning algorithm.
Contribution
It introduces the PareDown decomposition algorithm for minimizing programmable blocks in sensor networks, improving synthesis efficiency and network optimization.
Findings
Significant network size reductions achieved.
Algorithm outperforms exhaustive search in speed.
Near-optimal results for real and random designs.
Abstract
The advent of sensor networks presents untapped opportunities for synthesis. We examine the problem of synthesis of behavioral specifications into networks of programmable sensor blocks. The particular behavioral specification we consider is an intuitive user-created network diagram of sensor blocks, each block having a pre-defined combinational or sequential behavior. We synthesize this specification to a new network that utilizes a minimum number of programmable blocks in place of the pre-defined blocks, thus reducing network size and hence network cost and power. We focus on the main task of this synthesis problem, namely partitioning pre-defined blocks onto a minimum number of programmable blocks, introducing the efficient but effective PareDown decomposition algorithm for the task. We describe the synthesis and simulation tools we developed. We provide results showing excellent…
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Taxonomy
TopicsFormal Methods in Verification · Embedded Systems Design Techniques · VLSI and FPGA Design Techniques
