Design of a Virtual Component Neutral Network-on-Chip Transaction Layer
Philippe Martin

TL;DR
This paper discusses designing a virtual component-neutral Network-on-Chip transaction layer compatible with various standards, addressing key issues through a layered communication approach.
Contribution
It introduces a layered design methodology for a VC-neutral NoC that supports multiple communication standards, enhancing compatibility.
Findings
Layered approach effectively resolves compatibility issues.
Supports multiple standards like AHB 2.0, AXI, VCI, OCP.
Improves interoperability in NoC designs.
Abstract
Research studies have demonstrated the feasibility and advantages of Network-on-Chip (NoC) over traditional bus-based architectures but have not focused on compatibility communication standards. This paper describes a number of issues faced when designing a VC-neutral NoC, i.e. compatible with standards such as AHB 2.0, AXI, VCI, OCP, and various other proprietary protocols, and how a layered approach to communication helps solve these issues.
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Taxonomy
TopicsInterconnection Networks and Systems · Embedded Systems Design Techniques · Parallel Computing and Optimization Techniques
