Hardware Accelerated Power Estimation

TL;DR

This paper introduces power emulation, a hardware-accelerated approach for rapid power estimation in digital designs, achieving speedups of 10X to 500X over existing tools.

Contribution

It proposes a novel hardware-based power estimation method that can be integrated into design flows for faster power analysis.

Findings

Achieves 10X to 500X speedup over commercial RTL power estimation tools.

Demonstrates effectiveness on industrial designs.

Enables fast power estimation with hardware acceleration.

Abstract

In this paper, we present power emulation, a novel design paradigm that utilizes hardware acceleration for the purpose of fast power estimation. Power emulation is based on the observation that the functions necessary for power estimation (power model evaluation, aggregation, etc.) can be implemented as hardware circuits. Therefore, we can enhance any given design with "power estimation hardware", map it to a prototyping platform, and exercise it with any given test stimuli to obtain power consumption estimates. Our empirical studies with industrial designs reveal that power emulation can achieve significant speedups (10X to 500X) over state-of-the-art commercial register-transfer level (RTL) power estimation tools.