A Decompilation Approach to Partitioning Software for Microprocessor/FPGA Platforms

TL;DR

This paper introduces a novel software compilation method that partitions binaries onto FPGA hardware, leveraging decompilation to recover high-level info, enabling flexible software development with performance comparable to traditional high-level approaches.

Contribution

It presents a decompilation-based partitioning technique for microprocessor/FPGA platforms that reduces restrictions on software tool flow and improves hardware integration.

Findings

Achieves performance comparable to high-level compiler approaches

Allows use of any programming language and compiler

Reduces restrictions on software development flow

Abstract

In this paper, we present a software compilation approach for microprocessor/FPGA platforms that partitions a software binary onto custom hardware implemented in the FPGA. Our approach imposes less restrictions on software tool flow than previous compiler approaches, allowing software designers to use any software language and compiler. Our approach uses a back-end partitioning tool that utilizes decompilation techniques to recover important high-level information, resulting in performance comparable to high-level compiler-based approaches.